Search Results for "java projects on linux" - Page 2
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Showing 104 open source projects for "java projects on linux"
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Rent Manager SoftwareRent Manager is award-winning property management software built for residential, commercial, and short-term-stay portfolios of any size. The program’s fully customizable features include a double-entry accounting system, maintenance management/scheduling, marketing integration, mobile applications, more than 450 insightful reports, and an API that integrates with the best PropTech providers on the market.
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JMCAD is an program for the modeling and simulation of complex dynamic systems. This includes the ability to construct and simulate block diagrams. The visual block diagram interface offers a simple method for constructing, modifying and maintaining complex system models. The simulation engine provides fast and accurate solutions for linear, nonlinear, continuous time, discrete time, time varying and hybrid system designs. With JMCAD, users can quickly develop software or "virtual"...
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An API for manipulating EDIF netlists in Java. We use this API to analyze netlists as a part of our FPGA reliability project. We intend to keep the API as general as possible to support other netlist analysis and manipulation activities. This material is based upon work supported by the National Science Foundation under Grant No. 0801876. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the...
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TimeDoctor is a tool to visualize execution traces of tasks, queues, cache behavior, etc. While originally targeting embedded media processors and includes specific features for analyzing audio/video streaming applications it has wider applicability.
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Libraries, documentation, examples & drivers for Eagle Technology South Africa's Data Acquisition products. These include ISA, PCI, PCI Express, USB, Serial & Ethernet. Supported languages will be C/C++, JAVA, Perl, Python.
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Virtual instrumentation software, currently designed for modifying automobile engines. Intended as a modular framework to communicate with devices on an IO port (serial, parallel etc.) and allow a visual representation of the instrument.
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PHDL
An HDL alternative to PCB graphical schematic capture tools.
PHDL is an HDL that functions as an alternative to mainstream graphical schematic capture tools. The language is compiled into a pcb netlist which can then be imported into a layout tool. We are currently on version 2.1 of the tool. We have created an eclipse plugin version of the tool as well as a standalone command-line based version. Both function identically and output a netlist that can be imported into a pcb layout tool. VHDL revolutionized how FPGA designs and digital logic... -
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Java Decision Diagram Libraries (BDD)
Java Decision Diagrams (BDD) libraries: JDD and JBDD
This project has been moved to bitbucket.org: - https://bitbucket.org/vahidi/jbdd/wiki/Home - https://bitbucket.org/vahidi/jdd/wiki/Home It includes two libraries for working with decision diagrams: - JBDD: a Java interface to two popular BDD libraries, CUDD and BuDDy - JDD: a native Java library supporting BDD, Z-BDD -
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EEToolbelt
A suite of calculators and conversion tools for engineers.
Includes a signal scaling app, many engineering unit conversion calcs, and a task list pad to keep track of progress or notes. -
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Modelio-Open is a project hosting a set of open source extensions (SoaML, SysML and UML Testing Profile) for a previous version (1.2) of the Modelio Free tool . Currently, the lastest version (2.x) of Modelio modeling and generation tool is available at http://modelio.org/downloads/download-modelio.html. All extensions are downloadable at http://forge.modelio.org/projects.
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Create and run cloud-based virtual machines.Computing infrastructure in predefined or custom machine sizes to accelerate your cloud transformation. General purpose (E2, N1, N2, N2D) machines provide a good balance of price and performance. Compute optimized (C2) machines offer high-end vCPU performance for compute-intensive workloads. Memory optimized (M2) machines offer the highest memory and are great for in-memory databases. Accelerator optimized (A2) machines are based on the A100 GPU, for very demanding applications.
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CsvToFootprint
Convert CSV to Kicad footprint.
For electronics engineers, when using open source EDA tools, one of big challenge is component schematic symbols and footprints. If you are creating footprints for component with more than 100 pins, it becomes very time consuming and challenging to create error free footprints. Here is a simple program to create footprints for open source EDA kicad. The idea is to describe footprint in .csv format and convert .csv to kicad footprint format. At preset program supports Kicad only, but can be... -
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ECL is a system-level specification language for HW/SW designs and is based on Esterel and C. The ECL compiler parses ECL, writes Esterel and C, and uses the Esterel compiler to produce an implementation. Originally developed at Cadence Berkeley Labs.
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Power consumption analysis tools for embedded systems. MARTE to AADL model transformation with ATL for tools interoperability. More info on the project at http://sourceforge.net/apps/trac/lab-sticc/
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This program provides for easy modification and viewing of SPICE circuit files. It will also read SPICE3 RAW format (as well as GnuCap) and create graphs of results through an interactive GUI. It supports waveform math, copying to clipboard, and saving.
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O Projeto Cleusa - É uma interface de Gerenciamento de dispositivos. O projeto ROSANA aciona ações nos relês. O projeto Cleusa utiliza uma dispositivo de Hardware especifico, porem pode ser compatibilizado com qualquer outro hardware.
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Nocmaker is a tool for the design space exploration tool to help in the design of Network on chips. Noc Maker is based on JHDL.
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IPC 175x Utilities is a collection of software tools to support the IPC 1750 series of supplier declaration standards. These utilities are being developed to help electronics industry supply chain stakeholders implement the IPC 1750 series of standard.
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vMAGIC is a Java-API which helps creating VHDL generators and analyzers. vMAGIC comprises three parts: 1st a VHDL'93 compliant parser, 2nd a programming model to easily create and modify VHDL constructs, and 3rd a VHDL Writer to generate code.
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The PARSEC CEE is the primary achievement of several years of effort at NASA's Marshall Space Flight Center. The CEE was developed to allow engineers in the Advanced Concepts Department to rapidly prototype launch vehicle and spacecraft concepts.
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Verilog 2005 synthesizable subset parser built on ANTLR framework. 3-nov-2014: latest release here: https://github.com/gburdell/parser
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PPPP is a computer program used for partitioning parameterized orthogonal polygons into parameterized rectangles. With this program, it is possible to build rectangular corner stitching data structure for parameterized VLSI layouts.
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Currently, all existing formal tools are designed to serve as formal verifiers, using one implementation or another. JTLV is a new tool aimed to facilitate and provide a unified framework to the development of formal verification algorithms.
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GOOD NEWS: The functionality provided by this utility is now part of Kicad itself. Well done Kicad team. Keep up the good work. ------ This utility takes an input DSN file, exported from Kicad for example, and enables the user to assign various thick
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ElectroMimic is an electronic circuit simulator in Java™. The simulator is focused on the piecewise-linear models normally used by undergraduate students, but can also be linked with external simulation software for more realistic results.
