Open Source Desktop Operating Systems Electronic Design Automation (EDA) Software - Page 2
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Electronic Design Automation (EDA) Software for Desktop Operating Systems
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From improving customer experience through seamless sign-on to making MFA as easy as a click of a button – your login box must find the right balance between user convenience, privacy and security.
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When it comes to cybersecurity, what your clients don’t know can really hurt them. And believe it or not, keep them safe starts with asking questions. With ConnectWise Identify Assessment, get access to risk assessment backed by the NIST Cybersecurity Framework to uncover risks across your client’s entire business, not just their networks. With a clearly defined, easy-to-read risk report in hand, you can start having meaningful security conversations that can get you on the path of keeping your clients protected from every angle. Choose from two assessment levels to cover every client’s need, from the Essentials to cover the basics to our Comprehensive Assessment to dive deeper to uncover additional risks. Our intuitive heat map shows you your client’s overall risk level and priority to address risks based on probability and financial impact. Each report includes remediation recommendations to help you create a revenue-generating action plan.
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AvrGui jest to program, który zajmuje się kompilacją i programowaniem kontrolerów. Wykorzystuje on kompilator avr-gcc. Zastosowanie biblioteki Qt umożliwia prace programu zarówno na systemach Linux, jak i windows.
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BuddyCAD
A set of freeware applications for viewing/processing P-CAD files.
BuddyCAD Viewer+ can view/process files for following P-CAD versions: - P-CAD v4.5 - P-CAD v8.5 / v8.7 / v9.0 - P-CAD 99 / Accel / 2002 / 2004 / 2006 (through ASCII import) -
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C++ template classes for Multi-Value Logic support arbitrary precision and user defined Multi-Value Logic types. This library comes with pre-defined data types: integer, boolean, bit, logic, std_logic, bit_vector, logic_vector and std_logic_vector.
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Advanced Software Configuration Management (SCM) for Cadence DFII. Delivers full Perforce capability to Cadence DFII using Best Practices for SCM. Please see http://public.perforce.com/public/perforce/cdsp4/index.html
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ConnectWise CPQ, formerly ConnectWise Sell, is a professional quote and proposal automation software for IT solution providers. ConnectWise CPQ offers a wide range of tools that enables IT solution providers to save time, quote more, and win big. Top features include professional quote or proposal templates, product catalog and sourcing, workflow automation, sales reporting, and integrations with best-in-breed solutions like Cisco, Dell, HP, and Salesforce.
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Capsim(r) C Text Mode Kernel(TMK),DSP and communication blocks, topologies, libraries and tools for the development of high performance block diagram digital signal processing and communications systems,built in interpreter for scripting.SystemC support.
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ECL is a system-level specification language for HW/SW designs and is based on Esterel and C. The ECL compiler parses ECL, writes Esterel and C, and uses the Esterel compiler to produce an implementation. Originally developed at Cadence Berkeley Labs.
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FPGAsm
Create fast bare-metal FPGA designs without Verilog or VHDL
FPGAsm is a low-level alternative to verilog and VHDL. A near-instant 'assembler for FPGAs', this simple yet powerful language facilitates bottom-up design, layout and wiring of modules, and generation of .xdl output. With about 10 keywords to learn, you can start making circuits in minutes. Now you can focus on learning the ins and outs of the FPGA instead of complex tools and languages. Fast turnaround time and bottom-up approach invite exploration, experimentation, live circuit testing and physical test harness creation, radically changing the workflow. FPGAsm offers you an opportunity to REALLY understand Xilinx FPGAs, create circuits DIRECTLY on the FPGA using an opensource tool, and share your knowlege and projects with the community. Supported architectures: Xilinx (via xdl) -
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G2C (Geospatial to Civil) The LandGML Interoperability Experiment initiated by Autodesk, U.S. Army Corps of Engineers Engineering Research and Development Center, and Galdos Systems. this open source tool transforms LandGML into LandXML documents.
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A GTK+/Gnome2 graphical front end for the IW3HEV Vector Network Analyzer, also has a signal generator, and It displays graphicaly SWR, Phase, Return Loss, X impedance, Serial resistance, |Z| Impedanze, and Inductance, and capacitance.
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ConnectWise ScreenConnect, formerly ConnectWise Control, is a remote support solution for Managed Service Providers (MSP), Value Added Resellers (VAR), internal IT teams, and managed security providers. Fast, reliable, secure, and simple to use, ConnectWise ScreenConnect helps businesses solve their customers' issues faster from any location. The platform features remote support, remote access, remote meeting, customization, and integrations with leading business tools.
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This is an IEEE 1532 compliant JTAG programmer for CPLDs, FPGAs and similar programmable logic devices. It is only starting; developers are welcome!
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Java Decision Diagram Libraries (BDD)
Java Decision Diagrams (BDD) libraries: JDD and JBDD
This project has been moved to bitbucket.org: - https://bitbucket.org/vahidi/jbdd/wiki/Home - https://bitbucket.org/vahidi/jdd/wiki/Home It includes two libraries for working with decision diagrams: - JBDD: a Java interface to two popular BDD libraries, CUDD and BuDDy - JDD: a native Java library supporting BDD, Z-BDD -
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IC CAD tools, documentation, scripts, and libraries for designing high-performance ICs, including SUE for schematics, MAX for layouts, DPC for datapaths and MCC for megacells. Prebuilt binaries for Linux, Sparc-Solaris, and HP-PA.
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Now you can translate your vectorial and bitmap design data to your CNC machines! OpenCAM provides an interface where you can configure your CNC equipment and then export the file followiing it's commands! You can export PS,PDF,AI,EPS,DXF,SVG and Bitmap
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PFCDanielGav
Bienvenidos
Proyecto fin de carrera de Daniel Gaviño -
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PKtool is a SystemC/C++ environment dedicated to the power estimation for digital systems described in SystemC.
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Production (3 level) Programmer for Microchip PIC on Win9X,DOS,NT,Win2K. Flash and Eprom, 14 and 12 bit devices. Printer Port programmers and the BEL In-circuit Dual PRODUCTION Pic Programmer board.
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Call for the specifications of (next generation of spice) spice4. The concept of spice kernel is proposed. The main function of spice kernel is to provide a communication between "application layer" and "low-level Algorithm layer".
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SmGen
Verilog Finite State Machine (FSM) Code Generator
SmGen is a finite state machine (FSM) generator for Verilog. On the other hand, it is not an FSM entry tool. The input is behavioral Verilog with clock boundaries specifically set by the designer. SmGen unrolls this behavioral code and generates an FSM from it in synthesizable Verilog. Clock boundaries are explicitly provided by the designer so there is good control on the expected timing -
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Source Navigator for Verilog is a verilog parser that allows Source Navigator to be used with the Verilog Hardware Description Language. http://sources.redhat.com/sourcenav
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An online SSL (128-bit strong encryption) repository for scripts created and maintained by Synopsys Design Consultants.
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HW(VHDL) and SW of logic analyzer and On-Chip-Verification(OCV) for Value Change Dump(VCD) file format that exported to seemd SystemC ,ModelSIM, and many other EDA tools. Very easy and Simple.
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PEP is a modelling and verification framework for parallel systems, providing a large number of different modelling languages and verification techniques (e.g. SDL, Petri nets and model checking)
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The SESAME (Simulation of Embedded System Architectures for Multilevel Exploration) software system is an embedded system co-simulation environment and research tool which implements the ideas of the SESAME project at the University of Amsterdam.