Search Results for "convert python to c"

Gerber2PDF is a command-line tool to convert Gerber files to PDF for proofing and hobbyist printing purposes. It converts multiple Gerber files at once, placing the resulting layers each on it's own page within the PDF. Each layer has a PDF bookmark for easy reference. Layers can optionally be combined onto a single page and rendered with custom colours and transparency. There is a Drill to Gerber converter available from the downloads page.

BuddyCAD Viewer+ can view/process files for following P-CAD versions: - P-CAD v4.5 - P-CAD v8.5 / v8.7 / v9.0 - P-CAD 99 / Accel / 2002 / 2004 / 2006 (through ASCII import)

Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.

TCAD Device Simulator. DEVSIM is a semiconductor device simulation software, using the finite volume method. This software solves partial differential equations on a mesh. The Python interface allows the user to specify their own equations.

A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation.

Libraries, documentation, examples & drivers for Eagle Technology South Africa's Data Acquisition products. These include ISA, PCI, PCI Express, USB, Serial & Ethernet. Supported languages will be C/C++, JAVA, Perl, Python.

A IC/MEMS layout editor. Features: all angle, font generator, macros, boolean operations, design rule checker, supported formats:Calma GDSII, OASIS (Open Artwork System Interchange Standard), OpenAccess, DXF, CIF (Caltech Intermediate Form), ...

Project CAPLET is a capacitance extraction toolkit that extract capacitance at field-solver accuracy. CAPLET can directly handle GDS2 layout files into capacitance matrices in both GUI and command line interfaces. The internal extraction algorithm is specialized for VLSI interconnect structures but not exclusively, as long as the structure is of Manhattan geometry and embedded in a uniform dielectric material.

The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source signal analysis software suite that supports various device types, such as logic analyzers, MSOs, oscilloscopes, multimeters, LCR meters, sound level meters, thermometers, anemometers, light meters, dataloggers, function generators, power supplies, GPIB interfaces, and more.

naga EDA devotes to provide useful electronic design tools in C++ and, especially, Python. The current release contains naga.Verilog, a Verilog parser. Please visit project homepage http://naga-eda.org for more information

Language, compiler and simulator for CDL cycle description language Platforms: OSX, Linux, Cygwin CDL is a C-like language for hardware description; simulator generates C++ models and synthesizable verilog. Includes C++ cycle simulation engine.

tango2pcb is a console program that convert Tango PCB files and libraries to pcb program for linux (http://pcb.sourceforge.net).

Modular, Configurable Simulator for Computer Architects

The MP4Free project provides a simulation, analysis and exploration platform for multi-processor system-on-chip applications at variable level of abstraction, providing also a comprehensive component library.

JSalesman is a very efficient Travelling Salesman problem solver that produces high-quality outputs. JSalesman uses hierarchial and multi-level approaches to solve the problem fast.