Best in class SoC Integration Platform, IP-XACT, Verilog VHDL, UPF
IEEE LRM compliant System Verilog Parser in Java with Python, Tcl API
IEEE VHDL-93 LRM supported parser implemented in Java, APIs Python/Tcl
Exploiting Mox Software "Bipolar Transistors" database
Run tasks/tests, get trustworthy pass/fail info rolled up
Electronic design and programming tools suite like Eagle, MpLab
Open Network Object System
A perl based program to generate stub verilog from LEF
Scada for Home Automation
Search electronic components, datasheets, stock, price, alternatives
Hierarchical Schematic and PCB
dark themed version of free Audacity sound editor