Search Results for "user mode linux" - Page 3
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Showing 334 open source projects for "user mode linux"
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Project 2306 IDE Rad MacOS MCU DeveR
Electronic design and programming tools suite like Eagle, MpLab
Currently Only MacOS is Present, PreAlpha means not Ready to use, Application is provided Without Strict Garantee, License not OSI. All others platform Windows, Linux, HaikuOS STILL under TEST, Dummy "Hello world" is provided instead Project2306 IDE : Application pour la programmation de Microcontroleurs et d' Application Electronique Project2306 IDE : for All whom want to Create and Develop on Embed Platform Software as Programming Tools suite and PCB Design Planned Features... -
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SystemC-WMS (Wave Mixed Signal Simulator) is a class library that extends the standard SystemC kernel to allow modeling and simulation of complex systems comprising analog parts from heterogeneous domain (electrical, mechanical, thermal, ...).
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Control Techniques Software
CT Soft is software designed to be used with Control Techniques Drives
CTSoft can be used for configuring the following drives: Digitax ST Base Digitax ST Indexer Digitax ST Plus Digitax ST EZMotion FXMP25 Field Controller Mentor MP Unidrive 'Classic' in open-loop, closed-loop vector and servo modes Unidrive SP open-loop, closed-loop vector servo modes and regen mode Commander SK drives Commander GP20 Drive in open-loop, closed-loop vector Unidrive ES open-loop, closed-loop vector and servo modes Unidrive PV CTSoft system requirements: Pentium IV... -
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dxf2pcb
Convert DXF drawings of circuit boards to gEDA-PCB files.
This Python script reads in a DXF (ascii) file and generates a PCB output compatible with PCB Designer, part of the gEDA suite. It is designed for two purposes: One is to generate a PCB snippet from a mechanical drawing (such as a board outline), the other is to produce element files from CAD drawings. PCB snippets are easily imported into an existing gEDA-PCB project using File -> Load Layout to Buffer. Generated element files are ready to use (except for special cases like no-paste... -
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PLP
Powerfull pre-processor
Powerful Verilog Preprocessor. PLP stands for Perl Pre-processor. Perl is used as "control language" that is embedded in the Verilog code (or any other code) to generate code on the fly. It is used commonly as a Verilog pre-processor but can be used with any target/output language (C, C++, Java, VHDL, plain text etc) -
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NEW OPTIMIZATION TECHNOLOGY & PLANNING EXPERIMENT. Technology is designed for multidimensional optimization practical problems with continuous object functions. Technology higher efficiency than traditional optimization methods.
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O.N.O.S
Open Network Object System
Open Network Object System A Internet of things Content management system. Would you like to automate and controll remotely your home appliances from internet or lan using your phone /pc ? This program is for you! Internet of things made easy for everyone. Open source , simple to use , no need to know any programming language , you can add your programs easy , it runs bash command!every linux system will run it , portable . No installation required! just copy the folder where you... -
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CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files. Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).
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Resistor Value Identifier
Identify electronic resistor values
This HTML utility allows the user to select standard color codes or surface mount numbers, then it identifies the resistor value. There is no need to memorize color codes or multipliers. An online working example of this program can be used at ZoomAviation.com/programs. -
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This project is a general AVR bootloader, for different type of AVR device, all you need to do is modify macro definition, and you don not need to modify the main program.
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QSapecNG is a Qt-based symbolic analysis program for linear analog circuits. In fact, it consists of two indipendently parts: the SapecNG framework engine, and the application gui QSapecNG.
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Qfsm
A graphical Finite State Machine (FSM) designer.
A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation. -
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DEVSIM
TCAD Device Simulator
TCAD Device Simulator. DEVSIM is a semiconductor device simulation software, using the finite volume method. This software solves partial differential equations on a mesh. The Python interface allows the user to specify their own equations. -
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FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.
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... of systems or processes to demonstrate their behavior prior to building physical prototypes. The user builds his system model by selecting predefined blocks from a block library and simply wiring the blocks together. Each block of the diagram performs a function. Users can also create custom blocks in Java and add them to the JMCAD block library. JMCAD is a block diagram language for creating complex nonlinear dynamic systems.
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An API for manipulating EDIF netlists in Java. We use this API to analyze netlists as a part of our FPGA reliability project. We intend to keep the API as general as possible to support other netlist analysis and manipulation activities. This material is based upon work supported by the National Science Foundation under Grant No. 0801876. Any opinions, findings, and conclusions or recommendations expressed in this material are those of the author(s) and do not necessarily reflect the...
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This (Python) tool allows you to easily create FPGA bitfiles for your embedded system, from several Open Source IPs (compatibles with the OpenCores Wishbone bus) . It will also generates the corresponding drivers (currently only Linux ones).
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PKtool is a SystemC/C++ environment dedicated to the power estimation for digital systems described in SystemC.
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TimeDoctor is a tool to visualize execution traces of tasks, queues, cache behavior, etc. While originally targeting embedded media processors and includes specific features for analyzing audio/video streaming applications it has wider applicability.
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STANTOR
Scada for Home Automation
Stantor is a SCADA for home automation/domotic project. It drives : k8061-K8055(USB), K8000(I2C), Arduino Mega and Uno, X10, 1-Wire, electricity meters, Webcam (motion), infrared remote controls. It uses WEB browser, smartphone, xHTML, SOAP, Websocket, HTML5 Apache, mySQL, PHP, javascript and Ajax. Stantor allows control of electrical equipments like boilers, shutters, lamps, pumps, etc...connected to the 220V/110 VAC. Gathering information of various kinds such as temperature, light,... -
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ArchC is an open-source architecture description language based on SystemC. Its goal is to provide designers with a tool to evaluate new ideas in processor and ISA design, memory hierarchy, etc. and other aspects of computer architecture research.
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This is a collection of (hopefully) useful productivity enhancements of Mentor Graphics IC-Station tools
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The software is developed for calculations of hierarchy big circuits by methods of the tensor analysis of networks and diakoptic. It is planned also to application for joint calculation of circuits and the fields presented by electrical equivalent circuits. For input of circuits editor KiCAD is used.
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Virtual instrumentation software, currently designed for modifying automobile engines. Intended as a modular framework to communicate with devices on an IO port (serial, parallel etc.) and allow a visual representation of the instrument.