Showing 4 open source projects for "description logic"

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    Quiz/Survey/Test - QST

    Quiz/Survey/Test - QST

    A Free, complete, open source universal assessment/exam platform

    QST, the worlds unparalleled open source, multi-tenant, online/lan assessment software. From a quick quiz on your phone to very large scale, high stakes, proctored desktop testing, we make it easy/secure/economical. Our intuitive design contains features (Immediate detailed results, Create/Export/Import/Convert Questions, WYSIWYG/Math-Chemistry/Basic Editors, Question/Item Bank, Multiple Question Types, Multiple Delivery Styles, Multiple Delivery/Results Options, Adaptive/Branching...
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    Downloads: 29 This Week
    Last Update:
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  • 2
    UMHDL

    UMHDL

    Integrated Development Environment (IDE) for learning HDL

    UMHDL is an educational Integrated Development Environment (IDE) intended for learning digital designing with programmable logic devices using Hardware Description Languages (HDL) through simulation. It is an open-source application created at the Miguel Hernández University (UMH). The aim for the UMHDL development was to have a graphical application that allows learning the VHDL language without licensing restrictions (using some existing open-source tools) and requiring few resources. ...
    Downloads: 2 This Week
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  • 3
    ObjectVolume

    ObjectVolume

    Calculates Volume, Surface Area & Centroid of a Closed Triangular Mesh

    ...The volume of the tetrahedron is then calculated. Tetrahedrons with back facing triangles are added and those with forward facing triangles are subtracted yielding the object volume. A detailed description of the process is presented in the ObjectVolumeTutorial.doc document as well as program logic and results. A key component in the program is a subroutine that calculates the volume of a tetrahedron. Four sets of equations were tested and to my surprise all four produced similar results in accuracy and timing.
    Downloads: 0 This Week
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  • 4
    libLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logic gates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files.
    Downloads: 0 This Week
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