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The "Open On-Chip Debugger" provides JTAG/SWD access from GDB (or directly with TCL scripts) to processors with ARM and MIPS based cores. See website for full list of supported targets.

...Detection and reconstruction of C++ class hierarchies (RTTI, vtables). Signature-based removal of statically linked library code. Static analysis of executable files with detailed information. We currently support Windows (7 or later), Linux, macOS, and (experimentally) FreeBSD. An installed version of RetDec requires approximately 5 to 6 GB of free disk space.

Integrated Development Environment for some microcontrollers based on 8051(e.g. AT89S8253). Supported languages are Assembly and C. It has its own simulator, assembler, editor and many other tools. See the project web site for more details and the newest updates.

...The FCML library is free for commercial and non-commercial use as long as the terms of the LGPL license are met. Currently it supports such features as: - A one-line disassembler - A one-line assembler - An experimental multi-pass load-and-go assembler (Multi line!) - Support for the Intel and AT&T syntax - An instruction renderer - An instruction parser - Instructions represented as generic models - UNIX/GNU/Linux and Windows support - Portable - written entirely in C (no external dependencies) - C++ wrapper - Supported instruction sets: MMX, 3D-Now!, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4A, AVX, AVX2, AES, TBM, BMI1, BMI2, HLE, ADX, CLMUL, RDRAND, RDSEED, FMA, FMA4, LWP, SVM, XOP, VMX, SMX, AVX-512 Source code moved to: https://github.com/swojtasiak/fcml-lib

A standalone powerpc disassembler written as a wrapper over GNU libopcode library. It accepts the opcode ( in hex or decimal ) as it's argument and spits the disassembled output. Recently, a reference assembler has been added. It takes the instruction in string form and spits the assembled 32-bit opcode.It's not fully tested and may not work always.