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XLS is an open-source toolkit for building high-level hardware with a modern compiler stack that spans from a functional DSL to optimized IR and hardware generation. At the front end, DSLX lets you describe algorithms with strong typing and familiar control flow while remaining synthesis-friendly. The compiler lowers DSLX into a rich intermediate representation, applies aggressive optimization and scheduling passes, and can either JIT the design for software simulation or emit Verilog for FPGA/ASIC flows. ...
Linux Library on top of Libc focusing on long term support.
When computer power increases, programmers generally add more "features", thus making any performance gains in new hardware negligible. This project is an attempt to develop a library above libc that breaks out of this terrible loop.
A graphical tool for designing finite state machines and exporting them to Hardware Description Languages, such as VHDL, AHDL, Verilog, or Ragel/SMC files for C, C++, Objective-C, Java, Python, PHP, Perl, Lua code generation.
Relacy is a framework for agent-oriented programming in C++. Agents are autonomous objects, they interact fully asynchronously with messages. Relacy provides means for defining user agents and messages, as well as runtime system.
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The HOOST (Hardware Object Oriented Standard Template) libraries define a set of C++ templates for handling usual hardware in embedded software; additionally it ports the STL to embedded environment and make the links with the hardware concepts defined.