Showing 5 open source projects for "crowd simulation code"

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    GHDL

    GHDL

    VHDL 2008/93/87 simulator

    This directory contains the sources of GHDL, the open-source analyzer, compiler, simulator and (experimental) synthesizer for VHDL, a Hardware Description Language (HDL). GHDL is not an interpreter: it allows you to analyze and elaborate sources for generating machine code from your design. Native program execution is the only way for high-speed simulation. Full support for the 1987, 1993, 2002 versions of the IEEE 1076 VHDL standard, and partial for the 2008 and 2019 revisions. By using a code generator (LLVM, GCC or, x86_64/i386 only, a built-in one), it is much faster than any interpreted simulator. ...
    Downloads: 79 This Week
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  • 2
    GroIMP

    GroIMP

    Growth-grammar related Interactive Modelling Platform

    Important: Groimp migrates to Gitlab. You can find the latest code at "https://gitlab.com/grogra/groimp/". The version on Sourceforge will not be updated anymore. The modelling platform GroIMP is designed as an integrated platform which incorporates modelling, visualisation and interaction. It exhibits several features which makes itself suitable for the field of biological or ALife modelling: The “modelling backbone” consists in the language XL. It is fully integrated, e.g., the...
    Downloads: 5 This Week
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  • 3

    OpenM++

    OpenM++: open source microsimulation platform

    IMPORTANT: ========== Our project home page: https://openmpp.org Our latest source code and release available at: https://github.com/openmpp/main/releases/latest Our documentation available at: https://github.com/openmpp/openmpp.github.io/wiki SourceForge files still exist for historical reason. OpenM++ is an open source microsimulation platform inspired by and compatible with Modgen. OpenM++, compared to its closed source predecessor Modgen, has advantages like portability,...
    Downloads: 0 This Week
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  • 4
    ‘intelliworm’ is a prototype simulation of a Intelligent Species of a common earth worm,which inherits human like decision making capabilities through Neural Network intelligence representation,all developed by integrating .NET with Lisp and Yacc.
    Downloads: 0 This Week
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  • 5
    Verilator converts synthesizable Verilog HDL modules into SystemC modules. This enables users with Verilog code to have a publicly available co-simulation environment. For all information, see http://www.veripool.com/verilator.html.
    Downloads: 0 This Week
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