Mixed Analog/Digital Simulator framework - parser and elaborator for Verilog and Verilog-AMS, and an extended C++ (ParC - http://parallel.cc) to be used as the simulation engine.
DKU is an embedded parallel language, or "piggy-back" language that uses function calls to invoke the language's execution model. It tunes task-size to the hardware while hiding hardware details for high performance portability of parallel code.
Verilator converts synthesizable Verilog HDL modules into SystemC modules. This enables users with Verilog code to have a publicly available co-simulation environment. For all information, see http://www.veripool.com/verilator.html.