Search Results for "numerical simulation software"
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Showing 21 open source projects for "numerical simulation software"
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GHDL
VHDL 2008/93/87 simulator
This directory contains the sources of GHDL, the open-source analyzer, compiler, simulator and (experimental) synthesizer for VHDL, a Hardware Description Language (HDL). GHDL is not an interpreter: it allows you to analyze and elaborate sources for generating machine code from your design. Native program execution is the only way for high-speed simulation. Full support for the 1987, 1993, 2002 versions of the IEEE 1076 VHDL standard, and partial for the 2008 and 2019 revisions. By using a... -
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Numba
NumPy aware dynamic Python compiler using LLVM
Numba is an open source JIT compiler that translates a subset of Python and NumPy code into fast machine code. Numba translates Python functions to optimized machine code at runtime using the industry-standard LLVM compiler library. Numba-compiled numerical algorithms in Python can approach the speeds of C or FORTRAN. You don't need to replace the Python interpreter, run a separate compilation step, or even have a C/C++ compiler installed. Just apply one of the Numba decorators to your... -
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Fully Homomorphic Encryption
An FHE compiler for C++
This repository gathers Google’s practical tooling for Fully Homomorphic Encryption (FHE), focused on making it possible to run computations on encrypted data without ever decrypting it. At its core is a “transpiler” that converts ordinary functions (typically written in a restricted subset of C++ or similar) into FHE circuits, plus backends that execute those circuits with different FHE libraries. The workflow usually mirrors normal software development: write and test a cleartext... -
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BSC
Bluespec Compiler (BSC)
BSC is the open source compiler toolchain for Bluespec SystemVerilog, a high-level, rule-based hardware design language. It translates Bluespec descriptions into synthesizable Verilog, letting developers bring typed, modular abstractions into mainstream FPGA/ASIC flows. The compiler performs scheduling of atomic rules, elaborates parameterized modules, and enforces interface contracts, producing predictable RTL that integrates with existing EDA tools. A companion simulator enables fast... -
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GroIMP
Growth-grammar related Interactive Modelling Platform
Important: Groimp migrates to Gitlab. You can find the latest code at "https://gitlab.com/grogra/groimp/". The version on Sourceforge will not be updated anymore. The modelling platform GroIMP is designed as an integrated platform which incorporates modelling, visualisation and interaction. It exhibits several features which makes itself suitable for the field of biological or ALife modelling: The “modelling backbone” consists in the language XL. It is fully integrated, e.g., the... -
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An Open Source IEC 61131-3 Integrated Development Environment, providing PLCOpen SoftPLC programming, CanOpen IO's, and SVG based HMI.
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OpenM++
OpenM++: open source microsimulation platform
IMPORTANT: ========== Our project home page: https://openmpp.org Our latest source code and release available at: https://github.com/openmpp/main/releases/latest Our documentation available at: https://github.com/openmpp/openmpp.github.io/wiki SourceForge files still exist for historical reason. OpenM++ is an open source microsimulation platform inspired by and compatible with Modgen. OpenM++, compared to its closed source predecessor Modgen, has advantages like portability,... -
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xSTreamC is a streaming language developed by STMicroelectronics to support the mapping of data intensive streaming applications on distributed multiprocessor SoCs. A compiler and a simulation library are provided.
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The goal of the Fortran-to-Java project is to provide Java Application Programming Interfaces (APIs) to numerical libraries originally written in Fortran (particularly BLAS and LAPACK). The result of this work, JLAPACK, is distributed here.
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bts es un programa para convertir aplicaciones java (.jar) a una aplicacion windows (.exe) Es de codigo abierto y cualquiera lo puede modificar
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ZASM is a 2 pass assembler for Zilog's 8-bit CPU Z80. Supported platforms: Unix-style OS, e.g. MacOS X, Linux, BSD. Special support for ZX Spectrum emulator file formats. Binary or intel hex file output.
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Mixed Analog/Digital Simulator framework - parser and elaborator for Verilog and Verilog-AMS, and an extended C++ (ParC - http://parallel.cc) to be used as the simulation engine.
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The `Turing Machine Compiler Collection' (tmcc) contains a virtual machine which emulates a Turing Machine such as an assembler and a C-like compiler which assemble/compile the written code into the delta-notation.
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The CodeTime platform covers every aspect of parallel software from authoring, through distribution, to run-time. Its goals are: high programmer productivity; write once, run high performance anywhere; and wide acceptance.
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Create JIT common virtual machine into which famous language like java,microsoft ml,python etc can be translate.
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‘intelliworm’ is a prototype simulation of a Intelligent Species of a common earth worm,which inherits human like decision making capabilities through Neural Network intelligence representation,all developed by integrating .NET with Lisp and Yacc.
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A framework for generation of real-time numerical simulations of dynamical systems from differential and difference equations.
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JSim8086 is platform-independent Assembly Language Simulator of the Intel 8086 CPU. It was designed to be a learning tool (CAL) for first year Computing students who are learning Computer Systems Organisation and Assembly Programming.
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a delegate compiler and a numerical scripting language (like syscalls). the compiler is done in concept but the backend is still in the brainstorming phase.
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The ASCII Project
An ASCII MMORPG / World Simulation / Genetic Programming Project
This project was previously oriented towards creating an AI based Operating System. However new visitors should refer to www.theasciiproject.com for information about what this project has developed into. -
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Verilator converts synthesizable Verilog HDL modules into SystemC modules. This enables users with Verilog code to have a publicly available co-simulation environment. For all information, see http://www.veripool.com/verilator.html.
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