3 projects for "hdl" with 2 filters applied:

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    A low-code dashboard makes monitoring intuitive for any admin, while scripting and custom sensors give experts full control.

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  • 1
    PHDL

    PHDL

    An HDL alternative to PCB graphical schematic capture tools.

    PHDL is an HDL that functions as an alternative to mainstream graphical schematic capture tools. The language is compiled into a pcb netlist which can then be imported into a layout tool. We are currently on version 2.1 of the tool. We have created an eclipse plugin version of the tool as well as a standalone command-line based version. Both function identically and output a netlist that can be imported into a pcb layout tool.
    Downloads: 1 This Week
    Last Update:
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  • 2
    The Register Description Language (RDL) is an object modeling language used to specify and implement software accessible hardware registers and memories. A RDL compiler can create synthesizable HDL, documentation, driver code, system-c models, and more.
    Downloads: 0 This Week
    Last Update:
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  • 3
    Verilator converts synthesizable Verilog HDL modules into SystemC modules. This enables users with Verilog code to have a publicly available co-simulation environment. For all information, see http://www.veripool.com/verilator.html.
    Downloads: 0 This Week
    Last Update:
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