Search Results for "c to verilog"

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Showing 6 open source projects for "c to verilog"

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  • 1

    ipdbg

    IPDBG are free tools to debug intellectual properties (IP cores).

    Downloads: 0 This Week
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  • 2
    Scicos-HDL is a tool to design digital circuit system; it integrates the hardware circuit, algorithm and Scilab/Scicos environment as a plat for digital circuit design, simulation and Hardware Description Language generation. ZhangDong & KangCai
    Downloads: 0 This Week
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  • 3
    Parallelsimu provides interfaces for parallel simulation of RTL descriptions of complex hardware designs(SoCs, CPUs and etc.) written in Verilog HDL.
    Downloads: 0 This Week
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  • 4
    The system allows running and controlling the MAC controller on the Xilinx board with Virtex. This way the project provides a set of features and functionality to easy build the application and eCos and TCP/IP FreeBSD with access to Xilinx MAC controller
    Downloads: 0 This Week
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  • IBM Blueworks Live is a cloud-based business process modeling tool that helps you discover, map and document your processes. Icon
    IBM Blueworks Live is a cloud-based business process modeling tool that helps you discover, map and document your processes.

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  • 5
    The SBus is a family of high-speed packet-based databus standards, suitable for both networking and interdevice communication. They are optimized for high data density transactions. This project creates and documents the standards, schematics, and driver
    1 Review
    Downloads: 0 This Week
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  • 6
    Design and implementation of silicon and software for baseband processors conforming to IEEE wireless standards. Initial focus on WiMAX and WiFi.
    Downloads: 0 This Week
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