Open Source VHDL/Verilog Codec Software
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VHDL/Verilog Codec Software
View 212 business solutionsBrowse free open source VHDL/Verilog Codec Software and projects below. Use the toggles on the left to filter open source VHDL/Verilog Codec Software by OS, license, language, programming language, and project status.
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The H.264 VHDL core is a hardware implementation of the H.264 video compression algorithm. The core accepts up to the highest resolution HDTV video stream as input and outputs the encoded bitstream. Simple, fully synchronous design with low gate count.
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A hardware H.264 video encoder written in VHDL suited to non-interlaced IP cameras and megapixel cameras. Designed to be synthesized into an FPGA or ASIC. Fast and small. Modular. Extensible.
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