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Showing 7 open source projects for "tiny-core-plus"

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1

Inferno C++ to Verilog

Convert C++ software programs into synthesisable Verilog using the Clang compiler frontend to parse and SystemC for intermediates.

Downloads: 0 This Week

Last Update: 2018-08-07
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2

Project 2306 IDE Rad MacOS MCU DeveR

Electronic design and programming tools suite like Eagle, MpLab

...Tools suite for Arduino, Pinguino, Pic, AVR, ARM, Basic Stamp, Risc, other platform Fully Integrated IDE. Adobe PDF Help section SQL Connectivity Community Avail : https://www.facebook.com/Project-Core-2306-Nextgen-Eda-pcbradide-for-Mcumacoslinuxwindows-138250749681138/?fref=ts

Downloads: 0 This Week

Last Update: 2016-11-14
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3

PLP

Powerfull pre-processor

Powerful Verilog Preprocessor. PLP stands for Perl Pre-processor. Perl is used as "control language" that is embedded in the Verilog code (or any other code) to generate code on the fly. It is used commonly as a Verilog pre-processor but can be used with any target/output language (C, C++, Java, VHDL, plain text etc)

Downloads: 0 This Week

Last Update: 2016-03-10
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4

CoreTML framework

CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files. Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).

Downloads: 1 This Week

Last Update: 2016-01-28
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5

FSMDesigner

FSMDesigner is a C++ based implementation for a Finite State Machine (FSM) design tool with integrated Hardware Description Language (HDL) generation. FSMDesigner4 uses the Simple-Moore FSM model guaranteeing efficient fast complex control circuits.

Downloads: 4 This Week

Last Update: 2015-08-05
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6

vhdl npp plugin

Its a VHDL plugin for Notepad++ which is simular with the one which is available on emacs (Copy a selcted entity port and then paste it as instatiation , Signals or as Testbench )

Downloads: 0 This Week

Last Update: 2014-04-23
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7

ChipIDE

This project aim to develop a suite of tool to ease the development of ASIC/FPGA solution. The final program should be an IDE enabling the creation and specification of a project from it's start to finish.

Downloads: 0 This Week

Last Update: 2013-04-18
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