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Program handling file operations when interfacing embedded system.
Program handling file operations when interfacing embedded system by serial port. Main intention for creation of this program was getting files with code coverage out of the embedded system memory.
The Automatic JUnit Creation Tool analyzes java classes to map all possible test branches. The tool then guides users through the generation of a JUnit test.
Covered is a Verilog code coverage utility using VCD/LXT/FST dumpfiles (or VPI interface) and the design to generate line, toggle, memory, combinational logic, FSM state/arc and assertion coverage report metrics viewable via GUI or ASCII format.
This project is ported to github and can be found at:
https://github.com/chiphackers/covered
Javelina is an advanced code coverage tool that uses dynamic instrumentation to minimize the overhead for collecting coverage data. Additionally, Javelina allows the application of logical operations to code coverage data.
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