FastSim consists of:
- 'Facile' a highly flexible and expressive processor-architecture specification-language.
- A compiler for the specifications which produces high-performance, fast-forwarding simulators.
openDLX is a DLX/MIPS ISA compatible pipeline simulator.
(Visit https://github.com/smetzlaff/openDLX for the latest development version or if You want to contribute.)
Processor and realtime viewer for the program VXFlow (http://www.morgenthal.org/vxflow/), an numerical flow field simulator, written by Prof. Dr. Guido Morgenthal (http://www.uni-weimar.de/Bauing/MSK/?lang=en). This project uses the gloost framework.
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A graphical simulator for the LC3 processor, concentrating on the micro-architecture level.
The processor is thoroughly described in "Introduction to Computing Systems: From Bits & Gates to C & Beyond" by Yale Patt and Sanjay Patel (ISBN-0-07-246750-9
JPACS, Java Processor and Cache Simulator, was developed to give a simple and clear tool to simulate a processor with a complete associative memory cache at ISA level, using direct memory access or using a program written in assembly.
Tori assim is an assembler for the educational Txori assembly language and simulator for the bird processor. It's being developed as an open source clone for the closed source and windows only BIRD.
UTBlazer is a multiprocessor platform simulator developed in Java based on the Xilinx MicroBlaze processor and FPGA design platform. This system simulator is a back-annotated cycle-accurate functional emulator in fact.
A Java based simulator for the LC-3 16bit processor used in several CSS classes.
(specifically in the book "Introduction to Computing Systems: From Bits and Gates to C and Beyond" (2nd Ed)
Moved to GitHub