Search Results for "cache memory simulator"
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Showing 35 open source projects for "cache memory simulator"
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Kimi K3 in C
A 2.78-trillion-parameter Kimi K3 running inference on a single CPU
Kimi K3 in C is a portable C99 inference engine built to run the 2.78-trillion-parameter Kimi K3 model on CPUs without BLAS, machine-learning frameworks, or GPUs. It demonstrates inference from a roughly 1.56 TB checkpoint with measured memory use as low as 8.24 GB. The runtime streams model trunk layers and routed experts from disk instead of keeping all weights resident in memory. Memory presets balance pinned layers and an expert LRU cache for laptops, desktops, workstations, and servers. Incremental generation preserves KV cache and recurrent state between tokens. ... -
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Redis
An in-memory database that persists on disk
Redis is an open-source (BSD licensed), in-memory data structure store, used as a database, cache, and message broker. Redis provides data structures such as strings, hashes, lists, sets, sorted sets with range queries, bitmaps, hyperloglogs, geospatial indexes, and streams. Redis has built-in replication, Lua scripting, LRU eviction, transactions, and different levels of on-disk persistence, and provides high availability via Redis Sentinel and automatic partitioning with Redis Cluster. ... -
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Intel(R) RDT Software Package
User space software for Intel(R) Resource Director Technology
Intel CMT CAT is a user-space software package providing support for Intel's Resource Director Technology (RDT). It offers tools and libraries to monitor and control cache allocation and memory bandwidth. -
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Zen Kernel
Zen Patched Kernel Sources
Zen Patched Kernel Sources. This is the top level of the kernel’s documentation tree. Kernel documentation, like the kernel itself, is very much a work in progress; that is especially true as we work to integrate our many scattered documents into a coherent whole. ARC processors are highly configurable and several configurable options are supported in Linux. Some options are transparent to software (i.e cache geometries, some can be detected at runtime and configured and used accordingly,... -
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Memcached
memcached development tree
Memcached is a high-performance, open-source distributed memory caching system, typically used to accelerate dynamic, database-driven websites by storing frequently accessed data in RAM. To build memcached on your machine from the local repo, you will have to install autotools, automake, and libevent. If you want TLS support, install OpenSSL's development packages and change the configure line. libseccomp (optional, experimental, Linux), enables process restrictions for better security.... -
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stress-ng
This is the stress-ng upstream project git repository.
This is the stress-ng upstream project git repository. stress-ng will stress test a computer system in various selectable ways. It was designed to exercise various physical subsystems of a computer as well as the various operating system kernel interfaces. stress-ng was originally intended to make a machine work hard and trip hardware issues such as thermal overruns as well as operating system bugs that only occur when a system is being thrashed hard. Use stress-ng with caution as some of... -
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WASTE
Run the full 2.78-trillion-parameter Kimi K3 model
WASTE is an embeddable C inference engine for running extremely large mixture-of-experts models when the weights exceed available RAM. It keeps the shared model trunk in memory and streams only the experts selected for each token from fast NVMe storage. A bounded cache reuses recently needed experts, while lookahead routing begins disk reads before the next layer requires them. Its main target is the full 2.78-trillion-parameter Kimi K3 model, including multimodal image input. The engine has no third-party runtime dependency on its CPU inference path and exposes both a CLI and C library. ... -
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Likwid
Performance monitoring and benchmarking suite
Likwid is a simple to install and use toolsuite of command line applications and a library for performance oriented programmers. It works for Intel, AMD, ARMv8 and POWER9 processors on the Linux operating system. There is additional support for Nvidia and AMD GPUs. There is support for ARMv7 and POWER8/9 but there is currently no test machine in our hands to test them properly. -
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librsb
A shared memory parallel sparse matrix library including Sparse BLAS.
librsb is a library for sparse matrix computations featuring the Recursive Sparse Blocks (RSB) matrix format. This format allows cache efficient and multi-threaded (that is, shared memory parallel) operations on large sparse matrices. The most common operations necessary to iterative solvers are available, e.g.: matrix-vector multiplication, triangular solution, rows/columns scaling, diagonal extraction / setting, blocks extraction, norm computation, formats conversion. ... -
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IEC 60870-5 104 Protocol download
IEC 104 RTU Server Client Simulator Source Code Library Win Linux
v21.06.022 Complete implementation of iec 104 protocol standard including File transfer. Make your RTU, protocol converter, Gateway, HMI, Data concentrator compatible with iec 104. *Industry Proved * Worldwide Customers Download Evaluation Kit - IEC 104 Development Bundle In the Development Bundle, We included IEC 104 Server & Client Simulator, Windows & Linux... -
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IEC 60870-5 101 Protocol Win C#
IEC 60870-5-101 Source code Library Stack - Windows c, c++, c# .net
v21,06.022 The complete implementation of IEC 101 protocol stack including File Transfer-Monitor, Balanced and Unbalanced mode, Directory Commands, Supports all type of Monitoring, command, parameter ASDUs. IEC 101 Windows SDK contains Win DLL (precompiled library), Static link lib, Demo IEC101 Server & Client programs, Visual Studio Demo console project files, Doxygen . We used Visual studio compiler to create the dll, sample test projects. FreyrSCADA offering 1) IEC101... -
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IEC 870 104 Code Win Linux ARM download
IEC 104 Source code Library for Windows, Linux, QNX, Real time OS, ARM
v21.06.022 IEC 104 Source Code Library supports Windows, Embedded Linux (ARM, Coldfire, Power PC), Ubuntu Linux(X86, X86-64), Fedora, CentOS, Red Hat, PowerPC, QNX and more. Low memory footprint, easy start on any hardware platform, can operate with or without an operating system, delivered as a source code, high configuration allows to use required features only, royalty-free licensing. C, C++, C#, Borland c++ builder, Download free Evaluation Kit In the Development Bundle, included IEC 104 Server & Client Simulator, Windows & Linux SDK. ... -
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protocol IEC 104 Windows c c# code
IEC 104 Source code Library for Windows c c++ c# .net
v21.06.022 The complete implementation of IEC 104 protocol stack including File Transfer-Monitor and Control, Directory Commands, Supports all type of Monitoring, command, parameter ASDUs. Support C, C++, C# ( C SHARP .NET ), IEC 104 Windows SDK contains Win DLL (precompiled library), Static link lib, Demo IEC104 Server & Client programs, Visual Studio Demo console project files, Doxygen . Get free Download Evaluation Kit - IEC 104 Development Bundle In the Development... -
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PINRemoteImage
A thread safe, performant, feature rich image fetcher
...It uses the concept of download and processing tasks to ensure that even if multiple calls to download or process an image are made, it only occurs one time (unless an item is no longer in the cache). PINRemoteImageManager is backed by GCD and safe to access from multiple threads simultaneously. It ensures that images are decoded off the main thread so that animation performance isn't affected. None of its exposed methods allow for synchronous access. However, it is optimized to call completions on the calling thread if an item is in its memory cache. -
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CSAPP-Labs
Solutions and Notes for Labs of Computer Systems
CSAPP-Labs is a repository that organizes and provides practical lab exercises corresponding to the famous textbook Computer Systems: A Programmer’s Perspective (CS:APP), helping students deepen their understanding of how computer systems work at the machine level. The exercises cover core topics such as data representation, assembly language, processor architecture, cache behavior, memory hierarchy, linking, and concurrency, contextualizing abstract concepts from the book in real code and experiments. Each lab is structured to include test programs, Makefiles, harnesses, and step-by-step instructions that guide students through hands-on interaction with low-level programming and system behavior. By actually building and debugging code that runs close to hardware, learners acquire intuition about performance trade-offs, bit-level manipulation, stack frame layout, and how compilers and OS features influence execution. -
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Redis for Windows
Native port of Redis for Windows
...Redis is an open-source (BSD licensed), in-memory data structure store, used as a database, cache, and message broker. Redis provides data structures such as strings, hashes, lists, sets, sorted sets with range queries, bitmaps, hyperloglogs, geospatial indexes, and streams. Redis has built-in replication, Lua scripting, LRU eviction, transactions, etc. -
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Twitter Image Pipeline
Twitter Image Pipeline is a robust and performant image loading
The Twitter Image Pipeline is a streamlined framework for fetching and storing images in an application. The high-level concept is that all requests to fetch or store an image go through an image pipeline which encapsulates the work of checking the in-memory caches and an on disk cache before retrieving the image from over the network as well as keeping the caches both up to date and pruned. Twitter Image Pipeline came to fruition as numerous needs rose out of Twitter for iOS use cases. The system for image loading prior to TIP was fragile and inefficient with some severe edge cases. ... -
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test-tlb
Stupid memory latency and TLB tester
test-tlb is a tiny C microbenchmark that explores the performance characteristics of memory access patterns with respect to the CPU’s Translation Lookaside Buffer (TLB) and caches. It walks arrays using different strides and working-set sizes so you can observe when access patterns overflow cache or TLB capacity. By timing tight loops and varying parameters, the program reveals step-changes in latency that map to cache lines, page sizes, and TLB coverage. -
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Circuit simulator SPECI-SPICE
Circuit simulators like SPICE for low memory computers
SPECI-SPICE is a subset of SPICE intended to run on low powered computers like Amstrad CPC, ZX Spectrum, CP/M machines, old PC machines, some programmable calculators,etc. by keeping most important functionality of SPICE 2. -
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N.Tesla
Numerical Transient Simulator for Power System
...N.Tesla is an open source project to provide students and researchers of EE with a tool to implement new models for power system study and research. N.Tesla is short for Numerical TransiEnt SimuLAtor for power system and is in memory of Nikola Tesla, one the greatest scientists in alternating current power system. If you have any questions, please contact the author by send email to [lichgang AT gmail DOT com] or leave feedback in the Discussion forum. Mailing List for N.Tesla: http://www.freelists.org/list/ntesla Mailing List for N.Tesla Developer: http://www.freelists.org/list/ntesla-dev -
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Paper Engine 2
Multi-threaded 2D Renderer licensed under the Mozilla Public License
Hyper fast multi-threaded cross platform 2D renderer with optimized loading via file cache, basic GUI elements, and beginnings of an editor. -
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A next-generation memory cache daemon with idea similar to memcached, but which pervasively uses multithreading and provides advanced modes of data query and expiry. With its innovative system of record tags, it allows bulk expiry (or retrieval) of records by user-defined criteria such as "all records belogning to a certain page" or "all records belonging to a certain user".
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Sqlcached is a memory cache daemon, inspired by memcached, but offering more granular control by using SQL interface instead of key-value pairs.
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PerfCache
A high-performance C++ cache library implementing O(1) LRU and LFU.
PerfCache is an API that allows for creation and management of a memory cache. It includes basic cache operations (insert and retrieve), replacement policies, and expiration. Cache entry keys are strings of bytes, and data items are arrays of bytes. Variable length keys and data are supported. The cache itself is implemented as an array. The cache infrastructure includes a directory, mapping cache entry keys to cache array indices, and a sub-system for handling cache entry replacement metadata. ... -
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CSQL Main Memory Database / Cache
Main Memory Database Cache
CSQL - suite of three products, embedded relational database / stand alone Main Memory Database / updateable bi-directional table level cache. All are exposed via standard SQL interfaces such as ODBC/JDBC.
