Showing 4 open source projects for "intel"

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  • 1

    LightPCC

    Parallel pairwise correlation computation on Intel Xeon Phi clusters

    The first parallel and distributed library for pairwise correlation/dependence computation on Intel Xeon Phi clusters. This library is written in C++ template classes and achieves high speed by exploring the SIMD-instruction-level and thread-level parallelism within Xeon Phis as well as accelerator-level parallelism among multiple Xeon Phis. To facilitate balanced workload distribution, we have proposed a general framework for symmetric all-pairs computation by building provable bijective functions between job identifier and coordinate space for the first time.
    Downloads: 0 This Week
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  • 2

    SWAPHI: Smith-Waterman on Intel Xeon Phi

    The first protein sequence database search on shared-host Xeon Phis

    The first parallel algorithm to accelerate the Smith-Waterman protein database search on shared-host multiple Intel Xeon Phi coprocessors. By searching against the UniProtKB/TrEMBL database, SWAPHI achieves a performance of up to 58.8 billion cell updates per second (GCUPS) on a single Xeon Phi and up to 228.4 GCUPS on four Xeon Phis.
    Downloads: 1 This Week
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  • 3

    SWAPHI-LS: Alignment on Xeon Phi Cluster

    Smith-Waterman long DNA sequence alignment on Xeon Phi clusters

    The first parallel Smith-Waterman algorithm exploiting Intel Xeon Phi clusters to accelerate the alignment of long DNA sequences. This algorithm is written in C++ (with a set of SIMD intrinsic extensions), OpenMP and MPI. The performance evaluation revealed that our algorithm achieves very stable performance, and yields a performance of up to 30.1 GCUPS on a single Xeon Phi and up to 111.4 GCUPS on four Xeon Phis sharing a host.
    Downloads: 1 This Week
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  • 4
    MICA-aligner

    MICA-aligner

    Next-generation sequencing short reads aligner based on Intel® MIC

    Latest Code in GitHub: https://github.com/aquaskyline/MICA-aligner To better utilize MIC-enabled computers for NGS data analysis, we developed a new short-read aligner MICA that is optimized in view of MIC’s limitation and the extra parallelism inside each MIC core. Experiments on aligning 150bp paired-end reads show that MICA using one MIC board is ~4.85 times faster than the CPU-(multi-core)-based BWA-MEM and about the same speed as the GPU-based SOAP3-dp. Furthermore, MICA’s...
    Downloads: 0 This Week
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