Search Results for "core-analyzer"
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Showing 56 open source projects for "core-analyzer"
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Comprehensive Rust
This is the Rust course used by the Android team at Google
Comprehensive Rust is an open source training course developed by Google to provide a complete introduction to the Rust programming language. Originally created for Google engineers, it has since been released publicly for the broader developer community. The course is structured into modular lessons that cover the fundamentals of Rust, including ownership, lifetimes, traits, generics, and error handling, before progressing to advanced topics like concurrency, async programming, unsafe Rust,... -
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Vector Pascal is a language targeted at SIMD multi-core instruction-sets such as the AVX and SSE2 or x86-64-v3. It has a SIMD compiler which supports parallel vector operations, loop unrolling, common sub expression removal etc. It is implemented in Java.
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ploffy
Arduino-based floppy reader and writer for various floppy formats
Arduino-based floppy reader and writer for: Apple Disk II 5.25-inch floppies PC floppies (5.25-inch and 3.5-inch) Amiga floppies FM encoding floppies (e.g. as used on the HP 4145A semiconductor analyzer) -
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QuadRay-engine
Realtime raytracer using SIMD on ARM, MIPS, PPC and x86
QuadRay engine is a realtime raytracing project aimed at full SIMD utilization on ARM, MIPS, POWER and x86 architectures. The efficient use of SIMD is achieved by processing four rays at a time to match SIMD register width (hence the name). The rendering core of the engine is written in a unified SIMD assembler allowing single assembler code to be compatible with different processor architectures, thus reducing the need to maintain multiple parallel versions. At present, Intel SSE/SSE2/SSE4 and AVX/AVX2/AVX-512 (32/64-bit x86 ISAs), ARMv7 NEON/NEONv2, ARMv8 AArch32 and AArch64 NEON, SVE (32/64-bit ARM ISAs), MIPS 32/64-bit r5/r6 MSA and POWER 32/64-bit VMX/VSX (little/big-endian ISAs) are mostly implemented (/w horizontal reductions) although scalar improvements, wider SIMD vectors with zeroing/merging predicates in 3/4-operand instructions are planned as extensions to current 2/3-operand SPMD-driven vertical SIMD ISA. ... -
Train ML Models With SQL You Already KnowBuild and deploy ML models using familiar SQL. Automate data prep with built-in Gemini. Query 1 TB and store 10 GB free monthly.
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UniSIMD-assembler
SIMD macro assembler unified for ARM, MIPS, PPC and x86
UniSIMD assembler is a high-level C/C++ macro assembler framework unified across ARM, MIPS, POWER and x86 architectures. It establishes a subset of both BASE and SIMD instruction sets with clearly defined common API, so that application logic can be written and maintained in one place without code replication. The assembler itself isn't a separate tool, but rather a collection of C/C++ header files, which applications need to include directly in order to use. At present, Intel... -
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pFFh
a self-contained development environment for embedded systems.
pFFh is a programming language that allows you to launch applications on embedded systems safely, quickly and comfortably. pFFh runs on the target system, combining operation as a command interpreter and code compiler. We can say that pFFh behaves like an operating system on the board under development. All pFFh needs is a serial or USB-serial channel to communicate, and through it, receive and process console commands, either from a keyboard or from files sent from a desktop computer. At... -
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This is a basic, low-level library with pretensions to implementing features above and beyond (but not necessarily better than!) those implemented within the Standard C++ Library and the Boost Library. In particular data-flow based parallelism and a FIX-to Exchange-Protocol message translator that is blindingly fast! The source code has moved to GitLab: https://gitlab.com/jmmcg/libjmmcg
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HarduIno
Hardware-optimized Arduino library
This project is a partial overhaul of the Arduino hardware library, i.e. the main source files that make the core library. The intent is to reduce the overhead introduced by the initial library and eliminate the numerous function calls whenever direct register access is possible. -
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Simple STM32 Run
Run STM32 with simple examples
By remove dependency to complex STM32 library, each package try to give a simplest code clip drive STM32 working with particular functionality. Supported Core: STM32F107VC -
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Alan Framework
A C2 post-exploitation framework
...JavaScript script execution (in-memory without third party dependency) Fully compliant SOCKS5 proxy. Supported agent types: Powershell (x86/x64), DLL (x86/x64), Executable (x86/x64), Shellcode (x86/x64). Server.exe can be executed in Linux (via dotnet core) The network communication is fully encrypted with a session key not recoverable from the agent binary or from a traffic dump. Communication performed via HTTP/HTTPS. No external dependencies or libraries need to be installed. A powerful command shell. The agent configuration can be updated on the fly (you can change port and protocol too). -
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compatible lite doom
Ms Dos port with slopes 3d floors true3d demo compatibility fast speed
Dos Doom with 3d floors, slopes, destructible architecture, demo compatibility 1.9, fast speed youtube https://goo.gl/pbNybV Requirements: 486DX, 4MB RAM Win95, 8MB Dos(run -ram8mb parm) https://goo.gl/agT2wc https://goo.gl/3EFVBg Recommended: 486DX4 100MHz, 16MB RAM https://goo.gl/IWGLkQ Run on Dos,Win9x, XP 7 32 bits, Dosbox Turbo Android requires Dosbox: Win 64bit or WinXP w/ some video drivers https://goo.gl/FE6rRF Bugs: command line needs one space after wad or other parm to... -
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m6811dis
M6811 Code-Seeking Disassembler
The M6811 Code-Seeking Disassembler is a command-line tool that lets you enter known starting vectors for a given code image for the 6811 micro. It will disassemble the code and follow through branches to assist in the separation of code and data. Its companion Fuzzy Function Analyzer uses DNA Sequence Alignment Algorithms to locate similar code in multiple binaries, facilitating reverse-engineering. Originally written to analyze code from GM automotive engine controllers, but is useful anywhere a 6811 micro is being used. Version 1.0 was written in Borland Pascal in April 1996, and updated to v1.2 in June 1999. ... -
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yafu
Automated integer factorization
...The automation within YAFU is state-of-the-art, combining factorization algorithms in an intelligent and adaptive methodology that minimizes the time to find the factors of arbitrary input integers. Most algorithm implementations are multi-threaded, allowing YAFU to fully utilize multi- or many-core processors (including SNFS, GNFS, SIQS, and ECM). YAFU is primarily a command-line driven tool. You provide the number to factor and, via screen output and log files, YAFU will provide you the factors. There is also an interactive environment similar to MATLAB or PARI/GP, where you can type commands and store results. YAFU is very customizable, through the optional use of many many command line parameters and a very capable expression inter -
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ZX Master Mind
Master Mind Game developed for ZX Spectrum
Written in BASIC with core routines in Assembler for Z80. An 8 bit computer can guess your secret code at the maximum 5 attempts. -
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Pharos
RTOS for Secure, Safe and Real-Time Systems
Pharos is a free open-source RTOS for secure, safe and real-time systems with the following characteristics: - Memory and enhanced time partitioning (TSP) - Native support for sporadic, periodic and aperiodic threads - Fixed-priority preemptive scheduler - Execution time protection (threads are prevented from executing for more time than they are configured to) - Small size (full image has ~100 to 300KiB text, ~30KiB data) - Hard real-time determinism - Fast critical sections -... -
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FastFlow: programming multi-core
Pattern-based multi/many-core parallel programming framework
FastFlow is a C/C++ programming framework supporting the development of pattern-based parallel programs on multi/many-core, GPUs and distributed platforms. FastFlow run-time is built upon non-blocking threads and lock-free queues. Thanks to its very efficient CAS-free communication/synchronization support (e.g. few clock cycles core-to-core latency), FastFlow effectively supports the exploitation of fine grain parallelism, e.g. parallel codes managing very high frequency streams on commodity multi-core. ... -
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xinco [eXtensibe INformation COre] is a powerful Web-Service based Information and Document Management System (DMS) for files, text, URLs and contacts, featuring ACLs, versioning, full text search, an FTP-like client (easy install, J2EE+MySQL/PostgreSQL)
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Speakable Programming for Every Language
Your language to speak with all.
...Currently has alpha prototype support for analytic versions of the UN languages English, Mandarin Chinese, Spanish, Arabic, Russian and French as well as a bunch of others in addition to the core mwak language. The alpha IDE is at http://spel.sourceforge.net/src/web/spel.html (wait for it to finish loading before clicking "translate") Since it is early prototype, it's not easy to use, If you are interested, join the mailing list. latest code is in the git repository. -
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XFreq
a UNIX GUI to monitor Core i7 & Core 2 processors
XFreq provides a GUI to monitor the Processor frequencies (including Turbo Boost), the temperatures, C-States; and to alter the operational features of the Intel Core i7 processor. XFreq is also programmed for Core 2 and other Intel 64-bits architectures. -
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Cyberphantom Alfa Colony
AI new tipe
This is an experimental project whose main objective is the creation of artificial intelligence (AI) new tipe. At the core of this idea is the use of special genetic algorithm that emulates the single-celled organism. The colony of such cybernetic organisms can give rise to a "reasonable" network that have a huge intellect and computing power. -
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cMIPS
cMIPS - an FPGA ready VHDL model for 5-stage pipeline, MIPS32r2 core
This project was moved to https://gitlab.c3sl.ufpr.br/roberto/cmips The code here is no longer up to date. The VHDL model mimics the pipeline design described in Patterson & Hennessy's book (Computer Organisation and Design) and is an almost complete implementation of the MIPS32r2 instruction set. The TLB and assorted control registers will be included soon (as of fev 2015). The model was synthesized for an Altera EP4CE30F23. The model uses up 15% of combinational blocks and 5%... -
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Intel QuickSync Decoder
A free decoder that utilizes the Intel QuickSync technology
Abstracts the hassle of HW accelerated decoding in Intel's 2nd generation Core i3/i5/i7/Pentium/Celeron (SandyBridge) or newer Intel CPU/GPU using the Intel QuickSync technology. Started as an internal decoder within FFDShow. Can be easily ported to other DirectShow decoders. The Intel QuickSync decoder is now used within FFDShow, LAV video decoder and PotPlayer. -
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SNEeSe is an emulator for the Nintendo SNES console for x86 PCs. SNEeSe is written in 32-bit C, C++, and NASM x86 assembly. Project goal is to make as accurate, functional, and usable an emulation core as is reasonably possible.
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MITE HAS MOVED TO GITHUB! Mite is a simple general-purpose VM system that provides fast JIT translation to good native code, and safe interpretation. It is easy to target (the core specification is about 10 pages), and simple to implement (a few thousand lines of ISO C).
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RealBoy
Complete, Fast, Accurate, Game Boy/CGB/SGB Emulator.
RealBoy is a Complete, Fast, Accurate, Free/Open-Source Game Boy, Game Boy Color and Super Game Boy Emulator for Linux/Unix.
