Search Results for "zbar-64"

...The assembler itself isn't a separate tool, but rather a collection of C/C++ header files, which applications need to include directly in order to use. At present, Intel SSE/SSE2/SSE4 and AVX/AVX2/AVX-512 (32/64-bit x86 ISAs), ARMv7 NEON/NEONv2, ARMv8 AArch32 and AArch64 NEON, SVE (32/64-bit ARM ISAs), MIPS 32/64-bit r5/r6 MSA and POWER 32/64-bit VMX/VSX (little/big-endian ISAs) are mostly implemented (/w horizontal reductions) although scalar improvements, wider SIMD vectors with zeroing/merging predicates in 3/4-operand instructions are planned as extensions to current 2/3-operand SPMD-driven vertical SIMD ISA. ...

An educational software system of a tiny self-compiling C compiler, a tiny self-executing RISC-V emulator, and a tiny self-hosting RISC-V hypervisor. Selfie is a project of the Computational Systems Group at the Department of Computer Sciences of the University of Salzburg in Austria. The Selfie Project provides an educational platform for teaching undergraduate and graduate students the design and implementation of programming languages and runtime systems. The focus is on the construction...

The decompiler is not limited to any particular target architecture, operating system, or executable file format. ELF, PE, Mach-O, COFF, AR (archive), Intel HEX, and raw machine code supported. 32-bit: Intel x86, ARM, MIPS, PIC32, and PowerPC 64-bit: x86-64 supported. Demangling of symbols from C++ binaries (GCC, MSVC, Borland). Reconstruction of functions, types, and high-level constructs. Output in two high-level languages: C and a Python-like language. Generation of call graphs, control-flow graphs, and various statistics. Detection and reconstruction of C++ class hierarchies (RTTI, vtables). ...

GNU toolchain for gas, binutils, gdb etc modified to support the OR1K64 (OpenRISC 1K 64-bit) -based KPU (general purpose cryptoprocessor)

Table-based x86/x86-64 disassembler engine.