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NASM (Netwide Assembler) is a widely used, open-source assembler for the x86 architecture that provides a flexible and portable way to write low-level machine code using an Intel-style syntax. It is designed to support a wide variety of output formats, making it suitable for different operating systems and development environments. NASM is known for its simplicity and clarity, allowing developers to write assembly code that is both readable and efficient. It is commonly used in system programming, operating system development, and performance-critical applications where direct hardware control is required. ...

UniSIMD assembler is a high-level C/C++ macro assembler framework unified across ARM, MIPS, POWER and x86 architectures. It establishes a subset of both BASE and SIMD instruction sets with clearly defined common API, so that application logic can be written and maintained in one place without code replication. The assembler itself isn't a separate tool, but rather a collection of C/C++ header files, which applications need to include directly in order to use. At present, Intel...

RARS, the RISC-V Assembler, Simulator, and Runtime, will assemble and simulate the execution of RISC-V assembly language programs. Its primary goal is to be an effective development environment for people getting started with RISC-V.

An educational software system of a tiny self-compiling C compiler, a tiny self-executing RISC-V emulator, and a tiny self-hosting RISC-V hypervisor. Selfie is a project of the Computational Systems Group at the Department of Computer Sciences of the University of Salzburg in Austria. The Selfie Project provides an educational platform for teaching undergraduate and graduate students the design and implementation of programming languages and runtime systems.

The decompiler is not limited to any particular target architecture, operating system, or executable file format. ELF, PE, Mach-O, COFF, AR (archive), Intel HEX, and raw machine code supported. 32-bit: Intel x86, ARM, MIPS, PIC32, and PowerPC 64-bit: x86-64 supported. Demangling of symbols from C++ binaries (GCC, MSVC, Borland). Reconstruction of functions, types, and high-level constructs. Output in two high-level languages: C and a Python-like language.

Dev65 is a macro assembler, linker and librarian suite for the 6501, 6502, 65C02, 65816 and 65832 family of microprocessors coded in Java for portability. The code is based on a framework that could support other system architectures.

This is a student project designed to compete in the 2010 IEEE Computer Society Student Competition: http://www.computer.org/portal/web/competition/2010competition The Code Red architecture is designed for extremely lower power environments, like distributed sensor networks. Included is a design of that architecture, a Java-based simulator, an implementation (without vector instructions) designed as a Logisim circuit (http://ozark.hendrix.edu/~burch/logisim/), and more. The name...