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CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files.
Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).
This is a collection of tools and a code library to assist engineers who are developing SystemVerilog based verification environments. Components include utility libraries, scoreboard and shutdown manager implementation, register tool, etc.
A code template tool for VHDL development which outputs to the clipboard - this means it can be used with any tool. Written in Ada, using GTK. Runs on Windows XP and Linux with common source code