Search Results for "hdl simulator"

This directory contains the sources of GHDL, the open-source analyzer, compiler, simulator and (experimental) synthesizer for VHDL, a Hardware Description Language (HDL). GHDL is not an interpreter: it allows you to analyze and elaborate sources for generating machine code from your design. Native program execution is the only way for high-speed simulation. Full support for the 1987, 1993, 2002 versions of the IEEE 1076 VHDL standard, and partial for the 2008 and 2019 revisions. By using a code...

UMHDL is an educational Integrated Development Environment (IDE) intended for learning digital designing with programmable logic devices using Hardware Description Languages (HDL) through simulation. It is an open-source application created at the Miguel Hernández University (UMH). The aim for the UMHDL development was to have a graphical application that allows learning the VHDL language without licensing restrictions (using some existing open-source tools) and requiring few resources. So...

This project introduces a console application designed for functional and behavioral emulation of the old Soviet calculator EPOS-73 (ЭПОС-73) also known as Elektronika B3-11 (Электроника Б3-11). The project is conceived as an auxiliary for verification of the switch-level simulator based on Verilog HDL of the said apparatus. Calculator model EPOS-73 is interesting in that it was one of the first models of Soviet computing performed at LSI, that were fully designed by Soviet engineers...

HDL Simulator for SystemVerilog using the LLVM methodology