Search Results for "asic"
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Showing 35 open source projects for "asic"
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FuseSoC
Package manager and build abstraction tool for FPGA/ASIC development
FuseSoC is a package manager and build abstraction tool for hardware description language (HDL) code, aimed at simplifying the development and reuse of IP cores. It provides a standardized way to describe, manage, and build hardware projects, facilitating collaboration and reducing duplication of effort in FPGA and ASIC development. -
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Grin
Minimal implementation of the Mimblewimble protocol
Grin is an in-progress implementation of the Mimblewimble protocol. Grin is a privacy-preserving digital currency built openly by developers and distributed all over the world. Grin has no amounts and no addresses. Transactions can be trivially aggregated. To hide the origin of a newly created transaction, it gets relayed among a sub-set of peers before it is widely broadcasted. Electronic transactions for all. Without censorship or restrictions. Designed for the decades to come, not just... -
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firo
The privacy-focused cryptocurrency
Firo is a privacy-focused cryptocurrency implementing zero-knowledge proofs to enable anonymous transactions while maintaining decentralization and auditability. Formerly known as Zcoin, Firo pioneered several innovations in privacy tech including the Lelantus protocol, which enables unlinkable and untraceable transactions without the need for trusted setup. It combines cutting-edge cryptographic research with user-friendly features, making it accessible to both everyday users and privacy... -
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BSC
Bluespec Compiler (BSC)
BSC is the open source compiler toolchain for Bluespec SystemVerilog, a high-level, rule-based hardware design language. It translates Bluespec descriptions into synthesizable Verilog, letting developers bring typed, modular abstractions into mainstream FPGA/ASIC flows. The compiler performs scheduling of atomic rules, elaborates parameterized modules, and enforces interface contracts, producing predictable RTL that integrates with existing EDA tools. A companion simulator enables fast functional execution and debugging before handing designs to traditional verification and synthesis stages. ... -
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SpinalHDL
Scala based HDL
...It supports building systems at various levels—single modules, pipelines, memories, controllers, etc.—while letting the designer control timing, pipelining, and resource sharing explicitly. The generated hardware can be synthesized for FPGAs or ASIC flows, making it practical for real designs. -
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Dogecoin Mining - Software
This is a multi-threaded multi-pool FPGA and ASIC miner for DOGECOIN
Dogecoin Mining - Software is an open source miner for ASIC, GPU and FPGA. It works on Windows, Linux and macOS. This miner is extremely flexible in terms of platform and can work with a variety of hardware miners and GPUs including AMD, CUDA and NVIDIA platforms. See all reviews and talks here --> https://skipl.ink/dogecoin-miner -
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XLS
XLS: Accelerated HW Synthesis
...The compiler lowers DSLX into a rich intermediate representation, applies aggressive optimization and scheduling passes, and can either JIT the design for software simulation or emit Verilog for FPGA/ASIC flows. A key idea is “software-style” iteration: fast, deterministic simulation via the JIT encourages test-driven development and property checking before committing to RTL. XLS also provides tooling for pipelining, state insertion, and formal equivalence checks between different stages, giving developers confidence as designs evolve. ... -
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XiangShan
Open-source high-performance RISC-V processor
...The design targets modern performance goals—deep pipelines, speculative execution, multi-issue decode/execute, and sophisticated branch prediction—while remaining synthesizable for ASIC flows and portable to FPGAs for research. A modular microarchitecture separates frontend, backend, and memory subsystems with coherent caches and scalable interconnects, enabling multi-core configurations. The project invests heavily in verification: differential testing against reference models, extensive random instruction tests, and full software stacks (bootloaders, Linux) to validate correctness under realistic workloads. ... -
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Rocket Chip
Rocket Chip Generator
Rocket Chip is a parameterized RISC-V SoC generator written in Chisel that produces synthesizable RTL for a wide range of cores and configurations. At its heart is the Rocket core, a simple, in-order, five-stage RISC-V implementation, but the generator composes much more: coherent caches, MMUs, interrupt controllers, and buses via the TileLink interconnect. A diplomacy framework (LazyModules) lets designers wire components with negotiated parameters, enabling reuse and rapid exploration of... -
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RISC-V BOOM
SonicBOOM: The Berkeley Out-of-Order Machine
The riscv-boom project (also called BOOM or SonicBOOM) implements a high-performance, synthesizable out-of-order RISC-V core written in the Chisel hardware construction language. It targets the RV64GC (i.e. 64-bit with general + compressed + floating point) instruction set and supports features such as virtual memory, caches, atomics, and IEEE-754 floating point. The design is parameterizable, meaning users can tune pipeline widths, buffer sizes, functional units, and other... -
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Gen CSRs
Control/Status Register (CSR) Generator for FPGA and ASIC
CSR generator takes an input XML description and generates Verilog CSR implementation on APB bus, documentation, C header files and test collaterals. -
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Burstcoin Client for Windows
Burstcoin Windows Client
Burstcoin Wallet with Miner for Windows Burst is a currency like Bitcoin but efficient mineable with free HDD Storage instead of CPU / GPU or ASIC. Everyone with free disk space can mine it. This is a truly decentralized and environment friendly alternative to Bitcoin. -
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BFGminer
Miner for Bitcoins
BFGMiner is a modular ASIC/FPGA miner written in C, featuring dynamic clocking, monitoring, and remote interface capabilities. Bitcoin miner software with multi-threaded multi-pool gpu, fpga and asic mining support. Bitcoins are a digital currency, exchanged freely against all other currencies. coins may be issued by everyone, one just needs considerable computer power - and luck. to even out rewards for one's contribution, many initiative have forms to provide pools of computers and share the load. -
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Bytecoin (BCN)
Bytecoin is a cryptocurrency based on the unique CryptoNote technology
Bytecoin (BCN) is a cryptocurrency developed from scratch and based on the unique CryptoNote technology. Bytecoin provides its users with high level of privacy protection and true democratic way of mining. Main features of BCN are: - untraceable and unlinkable transactions, - egalitarian PoW, - analysis resistant blockchain. It's also designed to be easy mined on average PC. BCN brings equality to all miners and users. Bytecoin (BCN) was launched on July 4, 2012. -
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SOCGEN is a collection of tools that will help create digital components/ip_cores and then integrate them into a "System on a Chip"(SOC) for use in ASIC or FPGA designs.
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Cgminer
The combined CPU, GPU, FPGA, and ASIC miner for bitcoin, and litecoin
Features: - Very low overhead free c code for Linux and windows with very low non-mining CPU and ram usage - Stratum and GBT pooled mining protocol support, including ultra low overhead solo mining - Scaleable networking scheduler designed to scale to any size hashrate without networking delays yet minimise connection overhead - long poll support - will use longpoll from any pool if primary pool does not support it - Self detection of new blocks with a mini-database for slow/failing... -
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Mjollnircoin is a decentralized digital currency that enables instant payments to anyone in the world; it is a lite version of Bitcoin using a redundant cryptographic function as a proof-of-work algorithm. Mjollnircoin is a people's currency, intended to be efficiently mined with consumer-grade hardware. It is ultra secure, ASIC resistant, Multipool resistant and rare with a total number of 42 million mjollnircoins
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CGMiner
ASIC and FPGA miner in C for Bitcoin
CGMiner is an open source graphical frontend for mining Bitcoins. It supports both pooled and solo Bitcoin mining. The miner supports ASIC/FPGA/GPU mining. -
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Hispacoin Wallet
Cryptomoneda Hispana
...Esta moneda está basada en el protocolo Hispacoin, pero difiere de éste ya que puede ser extraída con hardware para el consumidor. Hispacoin utiliza un algoritmo con prueba de trabajo de minería basado en sha256, para ser orientado a las GPU y ASIC. La red Hispacoin está programada para producir 50 millones de unidades monetarias. -
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This tool can create XAdES (XML) signatures based upon ETSI TS 101 903 v1.3.2 standard. It also includes handling of ITU-T X.509 certificates and RFC 3161 timestamps.
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kacyminer
Kacyminer
Kacyminer is a multi-threaded multi-pool ASIC and FPGA miner written in C# for Windows (both 32 and 64bit) with dynamic CPU clock control, monitoring, and advanced fan support. Although this can be used on multiple block chains simultaneously, we advise you only use it on one block chain at a time for increased stability/performance. -
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Eyesens
Eyesens project
...After a first proof of concept using off-the-shelf components, we verified and positively confirmed the feasibility of the project. The size of the system, in particular the size of the ASIC, needs to be reduced by approximately 55%. This miniaturization is extremely important for the development of the whole system. The miniaturized device will in fact be compatible with standard micro-surgical procedures used during crystalline replacement in patients affected by cataracts. -
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