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libLCS is a hardware description library in C++ aiming to be as powerfull and easy as the Verilog HDL. It currently supports logic gates, flipflops, clock, and facilitates delays, continuous assignments and variable value dumping into VCD files.
Visually build and simulate boolean logic circuits
Visually build boolean logic circuits and then simulate their operation. Create custom components from user-designed circuits. Written in Java for cross-platform functionality.
NOTE: This project has moved to Bitbucket at http://bitbucket.org/kwellwood/circuitsandbox
edef - A small simulation framework for logic circuits, autoregressive processes, digital controller circuits and many more. Also there is a GUI application, that integrates a simple development environment and a circuit editor.
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Logic Design Simulator, Basically deals with the simulation of 74LS series chips. Helps students and beginers to make virtual connections and test the circuit :),written in GTK+ 1.2 and C
This is an ECAD toolkit for building programs and scripts to solve problems encounter in chip design.It currently addresses the layout, circuit and logic design areas.