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#613 vhdl folding confused after instance of component

Bug
closed-fixed
2
2016-02-23
2007-10-17
Anonymous
No

Hi

The folding mechanism gets confused by an
instance of a component if the optional keyword "component" is written before the name of the
component to instantiate.

1 architecture rtl of test is
2 component ff is
3 generic(
4 width : natural);
5 port(
6 d : in std_logic_vector;
7 q : out std_logic_vector
8 );
9 end component ff;
10 begin
11 instance : component ff
12 -- ^^^^^^^^^ is optional
13 generic map(
14 width => 8
15 )
16 port map(
17 d => d,
18 q => q
19 );
20
21 end architecture rtl;

when you fold the code on line 11 then the lines 11 to 21 will be folded.

If you remove the word "component" the folding will not be possible for the whole instance (generic map + port map).

regards daniel
danselmi at gmx.net

Discussion

  • Neil Hodgson

    Neil Hodgson - 2007-10-23
    • priority: 5 --> 2
    • assigned_to: nobody --> nyamatongwe
    • status: open --> open-accepted
     
  • Neil Hodgson

    Neil Hodgson - 2007-10-23

    Logged In: YES
    user_id=12579
    Originator: NO

    Since language support is the responsibility of those that use the language I won't be working on this.

     
  • danselmi

    danselmi - 2014-08-21

    patch to correctly fold instances

     
  • Neil Hodgson

    Neil Hodgson - 2014-08-21

    The added code declares new variables ch and style which shadow earlier declarations with the same names. It is better to use distinct names since that is less confusing for readers and avoids warnings from some compilers. The next section dealing with "procedure" and "function" is similar but uses distinct names although LocalStyle and LocalCh are a bit ugly.

    There is also shadowing of the variable "j" but that wasn't introduced by this patch. If you have time, it would be good to change the different variables currently called "j" to have distinct names.

     
  • danselmi

    danselmi - 2014-08-22

    {ch, style, j , LocalCh, LocalStyle} renamed to {chAtPos, styleAtPos, pos, chAtPos, styleAtPos}

    see attached patch.

     
  • Neil Hodgson

    Neil Hodgson - 2014-08-22
    • labels: Scintilla --> Scintilla, lexer, vhdl
    • status: open-accepted --> open-fixed
     
  • Neil Hodgson

    Neil Hodgson - 2014-08-22

    Committed as [859371].

     

    Related

    Commit: [859371]

  • Neil Hodgson

    Neil Hodgson - 2014-09-30
    • status: open-fixed --> closed-fixed
     
  • Cousteau

    Cousteau - 2015-01-14

    I think it's worth mentioning that this patch also fixes the issue with VHDL'93-style entity instantiations:

    COUNTER_INST : entity work.counter(rtl)
       generic map (
          MAX => 10
       )
       port map (
          Clk   => Clk,
          Reset => Reset,
          En    => ctr_en,
          Count => count
       );
    

    (I was about to report a bug about this, before realizing that this patch also fixed it)

     
  • Neil Hodgson

    Neil Hodgson - 2015-02-08

    There is a bug introduced by this change. Typing the keyword "entity" at the start of a file causes Scintilla to hang due to an unsigned pos (line 393) going less than 0 so very large.

     
  • Neil Hodgson

    Neil Hodgson - 2015-02-08
    • status: closed-fixed --> open
     
    • Neil Hodgson

      Neil Hodgson - 2015-02-11

      Fix committed as [057257].

       

      Related

      Commit: [057257]

  • Neil Hodgson

    Neil Hodgson - 2015-02-11
    • status: open --> open-fixed
     
  • Neil Hodgson

    Neil Hodgson - 2016-02-23
    • status: open-fixed --> closed-fixed
     

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