Trigger bug
Status: Alpha
Brought to you by:
dand2k
In m4_trigger.vhd the wrong version of channel data is
sent to the module. it should be sample_data instead of
channel data. Also, the trigger state machine idle
state examines s1_count instead of state1_cnt. The
result is that state1 is never entered since s1_count
is always 0 in the idle state.
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Additionally, the trigger condition 2 process examines
sample_data but should examine old_sample since the
channel_change register is one cycle delayed from sample_data.