From: Iker <i.c...@bi...> - 2014-01-24 09:26:56
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We are having some problems in Overo Fire boot process. As I read in many other posts, sometimes the system does not boot and only the "40W" is printed in the console. We have a custom design with no signals into the overo until SYSEN is set to high, as well as a weak pull-up in RXD3 pin (SYSEN-gated). Power supply is between 3.3 and 3.4V, rise time 500us. In these no-boot cases, the green led (power led) lights up, but not the blue led D3 (that is TPS65950 LED_B). SYSEN i asserted high and the power supply is OK. I'd appreciate if somebody can give me some advice on this topic. As I can see in the PMIC ref manual, the last step in the power-on sequence is not the assertiopn of SYSEN. After it, the HFCLKOUT starts working and the NRESPWRON signal is asserted high. NRESPWRON is defined by TI as " the reset signal delivered to the host processor at power-on reset (POR) when the voltage core and input/output (I/O) are correctly set up". Is there any testpoint where I can see that signal? Thanks. Best regards, Iker. -- View this message in context: http://gumstix.8.x6.nabble.com/Overo-Fire-boot-problems-tp4968613.html Sent from the Gumstix mailing list archive at Nabble.com. |
From: Ash C. <ash...@gm...> - 2014-01-25 03:04:09
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Hi Iker, The SYS_NRESPWRON signal going to ball AH25 of the OMAP is broken out on the J1 connector, pin 1. Details can be found here: http://gumstix.org/images/overo_signals_latest.pdf HTH, Ash On Fri, Jan 24, 2014 at 1:26 AM, Iker <i.c...@bi...> wrote: > > We are having some problems in Overo Fire boot process. As I read in many > other posts, sometimes the system does not boot and only the "40W" is > printed in the console. > > We have a custom design with no signals into the overo until SYSEN is set to > high, as well as a weak pull-up in RXD3 pin (SYSEN-gated). Power supply is > between 3.3 and 3.4V, rise time 500us. > > In these no-boot cases, the green led (power led) lights up, but not the > blue led D3 (that is TPS65950 LED_B). SYSEN i asserted high and the power > supply is OK. > > I'd appreciate if somebody can give me some advice on this topic. > > As I can see in the PMIC ref manual, the last step in the power-on sequence > is not the assertiopn of SYSEN. After it, the HFCLKOUT starts working and > the NRESPWRON signal is asserted high. NRESPWRON is defined by TI as " the > reset signal delivered to the host processor at power-on reset (POR) when > the voltage core and input/output (I/O) are correctly set up". > > Is there any testpoint where I can see that signal? > > Thanks. > > Best regards, > Iker. > > > > -- > View this message in context: http://gumstix.8.x6.nabble.com/Overo-Fire-boot-problems-tp4968613.html > Sent from the Gumstix mailing list archive at Nabble.com. > > ------------------------------------------------------------------------------ > CenturyLink Cloud: The Leader in Enterprise Cloud Services. > Learn Why More Businesses Are Choosing CenturyLink Cloud For > Critical Workloads, Development Environments & Everything In Between. > Get a Quote or Start a Free Trial Today. > http://pubads.g.doubleclick.net/gampad/clk?id=119420431&iu=/4140/ostg.clktrk > _______________________________________________ > gumstix-users mailing list > gum...@li... > https://lists.sourceforge.net/lists/listinfo/gumstix-users |
From: Iker <i.c...@bi...> - 2014-01-27 10:33:27
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Thanks Ash. I did some tests and the NRESPWRON is asserted high about 2ms after the SYSEN signal although sometimes the boot is not OK. So I supposed PMIC is doing well its job. Maybe someone from Gumstix can explain the booting process, this is, when and why the blue led D3 lights up. Is it a control led to show when the wake-up of the OMAP is successful? What happens after the NRESPWRON is asserted HIGH and before the led D3 is light-up? BR, Iker. -- View this message in context: http://gumstix.8.x6.nabble.com/Overo-Fire-boot-problems-tp4968613p4968618.html Sent from the Gumstix mailing list archive at Nabble.com. |
From: Ash C. <ash...@gm...> - 2014-01-27 21:16:28
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On Mon, Jan 27, 2014 at 2:17 AM, Iker <i.c...@bi...> wrote: > Maybe someone from Gumstix can explain the booting process, this is, when > and why the blue led D3 lights up. Is it a control led to show when the > wake-up of the OMAP is successful? The D3 LED lights up once u-boot code starts running on the processor. U-boot programmatically controls the LED_B line that drives this blue LED. > > What happens after the NRESPWRON is asserted HIGH and before the led D3 is > light-up? The 'Start-up' section of the processor reference manual (see 3.5.1 of [1]) is probably the best reference. That said, '40W' suggests that the processor is at least testing the different possible bootable interfaces to find a bootable interface (see Chapter 26 of [2]). Are you booting from NAND or MMC? If you are booting from MMC, double-check that the MMC voltage is coming on. I've found [3] to be a useful debugging tool. [1] http://www.ti.com/lit/gpn/dm3730 [2] http://www.ti.com/lit/pdf/sprugn4 [3] https://www.sparkfun.com/products/9419 --Ash |
From: Iker <i.c...@bi...> - 2014-02-19 08:20:13
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Thanks Ash. We are booting from MMC. The MMC voltage is ok in those no-boot cases. Any other suggestions? Best Regards, Iker. -- View this message in context: http://gumstix.8.x6.nabble.com/Overo-Fire-boot-problems-tp4968613p4968775.html Sent from the Gumstix mailing list archive at Nabble.com. |