From: <th...@ke...> - 2006-12-20 13:40:56
|
linux-core/drm_bufs.c | 3 +-- linux-core/drm_compat.h | 7 +++++++ 2 files changed, 8 insertions(+), 2 deletions(-) New commits: diff-tree 672593f611df484af89e425ff5f1ea0ea074f2bb (from 3b47b27558915a3a28591209e324b977e09d7c03) Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> Date: Wed Dec 20 14:40:36 2006 +0100 Replace vmalloc_32. The vmalloc_32 function together with the memset to clear the new pages are replaced with a vmalloc_user. A pre-2.6.18 compat vmalloc_user is added. Please replace any breakage on machines with > 1GB of memory. diff --git a/linux-core/drm_bufs.c b/linux-core/drm_bufs.c index ef110c2..1ff191a 100644 --- a/linux-core/drm_bufs.c +++ b/linux-core/drm_bufs.c @@ -195,14 +195,13 @@ static int drm_addmap_core(drm_device_t *maplist = list; return 0; } - map->handle = vmalloc_32(map->size); + map->handle = vmalloc_user(map->size); DRM_DEBUG("%lu %d %p\n", map->size, drm_order(map->size), map->handle); if (!map->handle) { drm_free(map, sizeof(*map), DRM_MEM_MAPS); return -ENOMEM; } - memset(map->handle, 0, map->size); map->offset = (unsigned long)map->handle; if (map->flags & _DRM_CONTAINS_LOCK) { /* Prevent a 2nd X Server from creating a 2nd lock */ diff --git a/linux-core/drm_compat.h b/linux-core/drm_compat.h index c7a4a7e..dcda193 100644 --- a/linux-core/drm_compat.h +++ b/linux-core/drm_compat.h @@ -148,6 +148,13 @@ static __inline__ void *kcalloc(size_t n } #endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) +#define vmalloc_user(_size) ({void * tmp = vmalloc(_size); \ + if (tmp) memset(tmp, 0, size); \ + (tmp);}) +#endif + + #include <linux/mm.h> #include <asm/page.h> |
From: <th...@ke...> - 2006-12-20 18:36:07
|
linux-core/drmP.h | 3 ++- linux-core/drm_mm.c | 29 ++++++++++++++--------------- 2 files changed, 16 insertions(+), 16 deletions(-) New commits: diff-tree 9acd4a13f2355e8f550669702a5c6db16cc14b0f (from 672593f611df484af89e425ff5f1ea0ea074f2bb) Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> Date: Wed Dec 20 19:33:50 2006 +0100 Remove the stupid root_node field from the core memory manager. diff --git a/linux-core/drmP.h b/linux-core/drmP.h index 2b364f7..77212d1 100644 --- a/linux-core/drmP.h +++ b/linux-core/drmP.h @@ -545,7 +545,8 @@ typedef struct drm_mm_node { } drm_mm_node_t; typedef struct drm_mm { - drm_mm_node_t root_node; + struct list_head fl_entry; + struct list_head ml_entry; } drm_mm_t; diff --git a/linux-core/drm_mm.c b/linux-core/drm_mm.c index 34708ef..0e54447 100644 --- a/linux-core/drm_mm.c +++ b/linux-core/drm_mm.c @@ -49,7 +49,7 @@ unsigned long drm_mm_tail_space(drm_mm_t struct list_head *tail_node; drm_mm_node_t *entry; - tail_node = mm->root_node.ml_entry.prev; + tail_node = mm->ml_entry.prev; entry = list_entry(tail_node, drm_mm_node_t, ml_entry); if (!entry->free) return 0; @@ -62,7 +62,7 @@ int drm_mm_remove_space_from_tail(drm_mm struct list_head *tail_node; drm_mm_node_t *entry; - tail_node = mm->root_node.ml_entry.prev; + tail_node = mm->ml_entry.prev; entry = list_entry(tail_node, drm_mm_node_t, ml_entry); if (!entry->free) return -ENOMEM; @@ -91,8 +91,8 @@ static int drm_mm_create_tail_node(drm_m child->start = start; child->mm = mm; - list_add_tail(&child->ml_entry, &mm->root_node.ml_entry); - list_add_tail(&child->fl_entry, &mm->root_node.fl_entry); + list_add_tail(&child->ml_entry, &mm->ml_entry); + list_add_tail(&child->fl_entry, &mm->fl_entry); return 0; } @@ -103,7 +103,7 @@ int drm_mm_add_space_to_tail(drm_mm_t *m struct list_head *tail_node; drm_mm_node_t *entry; - tail_node = mm->root_node.ml_entry.prev; + tail_node = mm->ml_entry.prev; entry = list_entry(tail_node, drm_mm_node_t, ml_entry); if (!entry->free) { return drm_mm_create_tail_node(mm, entry->start + entry->size, size); @@ -183,9 +183,8 @@ void drm_mm_put_block(drm_mm_node_t * cu { drm_mm_t *mm = cur->mm; - drm_mm_node_t *list_root = &mm->root_node; struct list_head *cur_head = &cur->ml_entry; - struct list_head *root_head = &list_root->ml_entry; + struct list_head *root_head = &mm->ml_entry; drm_mm_node_t *prev_node = NULL; drm_mm_node_t *next_node; @@ -216,7 +215,7 @@ void drm_mm_put_block(drm_mm_node_t * cu } if (!merged) { cur->free = 1; - list_add(&cur->fl_entry, &list_root->fl_entry); + list_add(&cur->fl_entry, &mm->fl_entry); } else { list_del(&cur->ml_entry); drm_ctl_free(cur, sizeof(*cur), DRM_MEM_MM); @@ -228,7 +227,7 @@ drm_mm_node_t *drm_mm_search_free(const unsigned alignment, int best_match) { struct list_head *list; - const struct list_head *free_stack = &mm->root_node.fl_entry; + const struct list_head *free_stack = &mm->fl_entry; drm_mm_node_t *entry; drm_mm_node_t *best; unsigned long best_size; @@ -263,15 +262,15 @@ drm_mm_node_t *drm_mm_search_free(const int drm_mm_clean(drm_mm_t * mm) { - struct list_head *head = &mm->root_node.ml_entry; + struct list_head *head = &mm->ml_entry; return (head->next->next == head); } int drm_mm_init(drm_mm_t * mm, unsigned long start, unsigned long size) { - INIT_LIST_HEAD(&mm->root_node.ml_entry); - INIT_LIST_HEAD(&mm->root_node.fl_entry); + INIT_LIST_HEAD(&mm->ml_entry); + INIT_LIST_HEAD(&mm->fl_entry); return drm_mm_create_tail_node(mm, start, size); } @@ -280,13 +279,13 @@ EXPORT_SYMBOL(drm_mm_init); void drm_mm_takedown(drm_mm_t * mm) { - struct list_head *bnode = mm->root_node.fl_entry.next; + struct list_head *bnode = mm->fl_entry.next; drm_mm_node_t *entry; entry = list_entry(bnode, drm_mm_node_t, fl_entry); - if (entry->ml_entry.next != &mm->root_node.ml_entry || - entry->fl_entry.next != &mm->root_node.fl_entry) { + if (entry->ml_entry.next != &mm->ml_entry || + entry->fl_entry.next != &mm->fl_entry) { DRM_ERROR("Memory manager not clean. Delaying takedown\n"); return; } |
From: <ai...@ke...> - 2006-12-21 06:47:37
|
shared-core/nouveau_fifo.c | 10 ++++++++-- 1 files changed, 8 insertions(+), 2 deletions(-) New commits: diff-tree b7586ab539e5f8d16b473543ab829d0a4441f87c (from 9acd4a13f2355e8f550669702a5c6db16cc14b0f) Author: Ben Skeggs <dar...@ii...> Date: Thu Dec 21 17:43:48 2006 +1100 nouveau: save/restore endianness flag on FIFO switch This makes my G5 survive glxinfo and nouveau_demo - airlied diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c index a611e43..f52f39f 100644 --- a/shared-core/nouveau_fifo.c +++ b/shared-core/nouveau_fifo.c @@ -358,7 +358,13 @@ static void nouveau_nv40_context_init(dr RAMFC_WR(DMA_GET , init->put_base); RAMFC_WR(DMA_INSTANCE , nouveau_chip_instance_get(dev, cb_obj->instance)); - RAMFC_WR(DMA_FETCH , 0x30086078); + RAMFC_WR(DMA_FETCH , NV_PFIFO_CACH1_DMAF_TRIG_128_BYTES | + NV_PFIFO_CACH1_DMAF_SIZE_128_BYTES | + NV_PFIFO_CACH1_DMAF_MAX_REQS_8 | +#ifdef __BIG_ENDIAN + NV_PFIFO_CACH1_BIG_ENDIAN | +#endif + 0x30000000 /* no idea.. */); RAMFC_WR(DMA_SUBROUTINE, init->put_base); RAMFC_WR(GRCTX_INSTANCE, 0); /* XXX */ RAMFC_WR(DMA_TIMESLICE , 0x0001FFFF); @@ -379,7 +385,7 @@ static void nouveau_nv40_context_save(dr RAMFC_WR(DMA_INSTANCE , NV_READ(NV_PFIFO_CACH1_DMAI)); RAMFC_WR(DMA_DCOUNT , NV_READ(NV_PFIFO_CACH1_DMA_DCOUNT)); RAMFC_WR(DMA_STATE , NV_READ(NV_PFIFO_CACH1_DMAS)); - //fetch + RAMFC_WR(DMA_FETCH , NV_READ(NV_PFIFO_CACH1_DMAF)); RAMFC_WR(ENGINE , NV_READ(NV_PFIFO_CACH1_ENG)); RAMFC_WR(PULL1_ENGINE , NV_READ(NV_PFIFO_CACH1_PUL1)); RAMFC_WR(ACQUIRE_VALUE , NV_READ(NV_PFIFO_CACH1_ACQUIRE_VALUE)); |
From: <th...@ke...> - 2006-12-21 11:07:53
|
linux-core/drm_agpsupport.c | 21 +++++++++++++++++++++ 1 files changed, 21 insertions(+) New commits: diff-tree 72cb361c5cbf4f0aeae25312369087b8a234bc5a (from ae5822561370b34808603820a063fc6e8b17dbe2) Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> Date: Thu Dec 21 12:05:49 2006 +0100 Bug #9120. Require at least agpgart version 0.102 for the AGP TTM backend. This should hopefully avoid crashes when the wrong agpgart driver is installed. diff --git a/linux-core/drm_agpsupport.c b/linux-core/drm_agpsupport.c index 79d9a83..9cdbdaf 100644 --- a/linux-core/drm_agpsupport.c +++ b/linux-core/drm_agpsupport.c @@ -559,6 +559,8 @@ int drm_agp_unbind_memory(DRM_AGP_MEM * #define AGP_USER_MEMORY (AGP_USER_TYPES) #define AGP_USER_CACHED_MEMORY (AGP_USER_TYPES + 1) #endif +#define AGP_REQUIRED_MAJOR 0 +#define AGP_REQUIRED_MINOR 102 static int drm_agp_needs_unbind_cache_adjust(drm_ttm_backend_t *backend) { return ((backend->flags & DRM_BE_FLAG_BOUND_CACHED) ? 0 : 1); @@ -669,6 +671,24 @@ drm_ttm_backend_t *drm_agp_init_ttm(stru drm_ttm_backend_t *agp_be; drm_agp_ttm_priv *agp_priv; + struct agp_kern_info *info; + + if (!dev->agp) { + DRM_ERROR("AGP is not initialized.\n"); + return NULL; + } + info = &dev->agp->agp_info; + + if (info->version.major != AGP_REQUIRED_MAJOR || + info->version.minor < AGP_REQUIRED_MINOR) { + DRM_ERROR("Wrong agpgart version %d.%d\n" + "\tYou need at least version %d.%d.\n", + info->version.major, + info->version.minor, + AGP_REQUIRED_MAJOR, + AGP_REQUIRED_MINOR); + return NULL; + } agp_be = (backend != NULL) ? backend: drm_ctl_calloc(1, sizeof(*agp_be), DRM_MEM_MAPPINGS); @@ -683,6 +703,7 @@ drm_ttm_backend_t *drm_agp_init_ttm(stru return NULL; } + agp_priv->mem = NULL; agp_priv->alloc_type = AGP_USER_MEMORY; agp_priv->cached_type = AGP_USER_CACHED_MEMORY; |
From: <dar...@ke...> - 2006-12-26 12:34:18
|
shared-core/nouveau_drv.h | 1 shared-core/nouveau_fifo.c | 107 +++++++++++++++++---------------------------- 2 files changed, 43 insertions(+), 65 deletions(-) New commits: diff-tree 9e019df75764a7ce79266ceb058307336ddf00ef (from 72cb361c5cbf4f0aeae25312369087b8a234bc5a) Author: Ben Skeggs <dar...@ii...> Date: Tue Dec 26 23:30:26 2006 +1100 nouveau: Alloc cmdbuf for each channel individually diff --git a/shared-core/nouveau_drv.h b/shared-core/nouveau_drv.h index 4dff0c5..42397c3 100644 --- a/shared-core/nouveau_drv.h +++ b/shared-core/nouveau_drv.h @@ -73,6 +73,7 @@ struct nouveau_fifo /* mapping of the regs controling the fifo */ drm_local_map_t *regs; /* dma object for the command buffer itself */ + struct mem_block *cmdbuf_mem; struct nouveau_object *cmdbuf_obj; /* objects belonging to this fifo */ struct nouveau_object *objs; diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c index f52f39f..1014d8a 100644 --- a/shared-core/nouveau_fifo.c +++ b/shared-core/nouveau_fifo.c @@ -214,12 +214,14 @@ int nouveau_fifo_init(drm_device_t *dev) return 0; } -static int nouveau_dma_init(struct drm_device *dev) +static int +nouveau_fifo_cmdbuf_alloc(struct drm_device *dev, int channel) { drm_nouveau_private_t *dev_priv = dev->dev_private; struct nouveau_config *config = &dev_priv->config; struct mem_block *cb; - int cb_min_size = nouveau_fifo_number(dev) * max(NV03_FIFO_SIZE,PAGE_SIZE); + struct nouveau_object *cb_dma = NULL; + int cb_min_size = max(NV03_FIFO_SIZE,PAGE_SIZE); /* Defaults for unconfigured values */ if (!config->cmdbuf.location) @@ -228,27 +230,40 @@ static int nouveau_dma_init(struct drm_d config->cmdbuf.size = cb_min_size; cb = nouveau_mem_alloc(dev, 0, config->cmdbuf.size, - config->cmdbuf.location, (DRMFILE)-2); - /* Try defaults if that didn't succeed */ - if (!cb) { - config->cmdbuf.location = NOUVEAU_MEM_FB; - config->cmdbuf.size = cb_min_size; - cb = nouveau_mem_alloc(dev, 0, config->cmdbuf.size, - config->cmdbuf.location, (DRMFILE)-2); - } + config->cmdbuf.location | NOUVEAU_MEM_MAPPED, + (DRMFILE)-2); if (!cb) { DRM_ERROR("Couldn't allocate DMA command buffer.\n"); return DRM_ERR(ENOMEM); } - dev_priv->cmdbuf_ch_size = (uint32_t)cb->size / nouveau_fifo_number(dev); - dev_priv->cmdbuf_alloc = cb; + if (cb->flags & NOUVEAU_MEM_AGP) { + cb_dma = nouveau_dma_object_create(dev, + cb->start, cb->size, + NV_DMA_ACCESS_RO, NV_DMA_TARGET_AGP); + } else if (dev_priv->card_type != NV_04) { + cb_dma = nouveau_dma_object_create(dev, + cb->start - drm_get_resource_start(dev, 1), + cb->size, + NV_DMA_ACCESS_RO, NV_DMA_TARGET_VIDMEM); + } else { + /* NV04 cmdbuf hack, from original ddx.. not sure of it's + * exact reason for existing :) PCI access to cmdbuf in + * VRAM. + */ + cb_dma = nouveau_dma_object_create(dev, + cb->start, cb->size, + NV_DMA_ACCESS_RO, NV_DMA_TARGET_PCI); + } - DRM_INFO("DMA command buffer is %dKiB at 0x%08x(%s)\n", - (uint32_t)cb->size>>10, (uint32_t)cb->start, - config->cmdbuf.location == NOUVEAU_MEM_FB ? "VRAM" : "AGP"); - DRM_INFO("FIFO size is %dKiB\n", dev_priv->cmdbuf_ch_size>>10); + if (!cb_dma) { + nouveau_mem_free(dev, cb); + DRM_ERROR("Failed to alloc DMA object for command buffer\n"); + return DRM_ERR(ENOMEM); + } + dev_priv->fifos[channel].cmdbuf_mem = cb; + dev_priv->fifos[channel].cmdbuf_obj = cb_dma; return 0; } @@ -407,15 +422,6 @@ static int nouveau_fifo_alloc(drm_device drm_nouveau_private_t *dev_priv = dev->dev_private; struct nouveau_object *cb_obj; - /* Init cmdbuf on first FIFO init, this is delayed until now to - * give the ddx a chance to configure the cmdbuf with SETPARAM - */ - if (!dev_priv->cmdbuf_alloc) { - ret = nouveau_dma_init(dev); - if (ret) - return ret; - } - /* * Alright, here is the full story * Nvidia cards have multiple hw fifo contexts (praise them for that, @@ -433,44 +439,17 @@ static int nouveau_fifo_alloc(drm_device if (i==nouveau_fifo_number(dev)) return DRM_ERR(EINVAL); - /* allocate a dma object for the command buffer */ - if (dev_priv->cmdbuf_alloc->flags & NOUVEAU_MEM_AGP) { - cb_obj = nouveau_dma_object_create(dev, - dev_priv->cmdbuf_alloc->start, - dev_priv->cmdbuf_alloc->size, - NV_DMA_ACCESS_RO, - NV_DMA_TARGET_AGP); - - } else if (dev_priv->card_type != NV_04) { - cb_obj = nouveau_dma_object_create(dev, - dev_priv->cmdbuf_alloc->start - - drm_get_resource_start(dev, 1), - dev_priv->cmdbuf_alloc->size, - NV_DMA_ACCESS_RO, - NV_DMA_TARGET_VIDMEM); - } else { - /* NV04 cmdbuf hack, from original ddx.. not sure of it's - * exact reason for existing :) PCI access to cmdbuf in - * VRAM. - */ - cb_obj = nouveau_dma_object_create(dev, - dev_priv->cmdbuf_alloc->start, - dev_priv->cmdbuf_alloc->size, - NV_DMA_ACCESS_RO, - NV_DMA_TARGET_PCI); - } - if (!cb_obj) { - DRM_ERROR("unable to alloc object for command buffer\n"); - return DRM_ERR(EINVAL); - } - dev_priv->fifos[i].cmdbuf_obj = cb_obj; + /* allocate a command buffer, and create a dma object for the gpu */ + ret = nouveau_fifo_cmdbuf_alloc(dev, i); + if (ret) return ret; + cb_obj = dev_priv->fifos[i].cmdbuf_obj; /* that fifo is used */ dev_priv->fifos[i].used=1; dev_priv->fifos[i].filp=filp; init->channel = i; - init->put_base = i*dev_priv->cmdbuf_ch_size; + init->put_base = 0; dev_priv->cur_fifo = init->channel; nouveau_wait_for_idle(dev); @@ -544,14 +523,9 @@ static int nouveau_fifo_alloc(drm_device if (ret != 0) return ret; - /* then, the fifo itself */ - init->cmdbuf = dev_priv->cmdbuf_alloc->start; - init->cmdbuf += init->channel * dev_priv->cmdbuf_ch_size; - init->cmdbuf_size = dev_priv->cmdbuf_ch_size; - ret = drm_addmap(dev, init->cmdbuf, init->cmdbuf_size, _DRM_REGISTERS, - 0, &dev_priv->fifos[init->channel].map); - if (ret != 0) - return ret; + /* pass back FIFO map info to the caller */ + init->cmdbuf = dev_priv->fifos[init->channel].cmdbuf_mem->start; + init->cmdbuf_size = dev_priv->fifos[init->channel].cmdbuf_mem->size; /* FIFO has no objects yet */ dev_priv->fifos[init->channel].objs = NULL; @@ -587,6 +561,9 @@ void nouveau_fifo_free(drm_device_t* dev /* reenable the fifo caches */ NV_WRITE(NV_PFIFO_CACHES, 0x00000001); + /* Deallocate command buffer, and dma object */ + nouveau_mem_free(dev, dev_priv->fifos[n].cmdbuf_mem); + dev_priv->fifo_alloc_count--; } |
From: <dar...@ke...> - 2006-12-26 15:07:45
|
shared-core/nouveau_mem.c | 1 + 1 files changed, 1 insertion(+) New commits: diff-tree c38ede06670b47620bbce33c5a4affd063769475 (from 9e019df75764a7ce79266ceb058307336ddf00ef) Author: Ben Skeggs <dar...@ii...> Date: Wed Dec 27 01:58:57 2006 +1100 nouveau: return the *actual* type of memory alloc'd to userspace diff --git a/shared-core/nouveau_mem.c b/shared-core/nouveau_mem.c index 82221c8..4d4100e 100644 --- a/shared-core/nouveau_mem.c +++ b/shared-core/nouveau_mem.c @@ -515,6 +515,7 @@ int nouveau_ioctl_mem_alloc(DRM_IOCTL_AR if (!block) return DRM_ERR(ENOMEM); alloc.region_offset=block->start; + alloc.flags=block->flags; DRM_COPY_TO_USER_IOCTL((drm_nouveau_mem_alloc_t __user *) data, alloc, sizeof(alloc)); |
From: <th...@ke...> - 2006-12-27 14:33:30
|
linux-core/drm_compat.c | 5 ++--- linux-core/drm_compat.h | 13 +++---------- linux-core/drm_ttm.c | 6 ++---- linux-core/drm_vm.c | 5 ++--- 4 files changed, 9 insertions(+), 20 deletions(-) New commits: diff-tree 975136d6e5adc6b6a03719499cf39fbd3f67dc90 (from c38ede06670b47620bbce33c5a4affd063769475) Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> Date: Wed Dec 27 15:32:09 2006 +0100 Proper allocation of AGP pages for ttms. diff --git a/linux-core/drm_compat.c b/linux-core/drm_compat.c index cde77ea..6bb5842 100644 --- a/linux-core/drm_compat.c +++ b/linux-core/drm_compat.c @@ -251,7 +251,8 @@ struct page *drm_vm_ttm_nopage(struct vm page = NOPAGE_OOM; goto out; } - page = ttm->pages[page_offset] = drm_alloc_gatt_pages(0); + page = ttm->pages[page_offset] = + alloc_page(GFP_KERNEL | __GFP_ZERO | GFP_DMA32); if (!page) { drm_free_memctl(PAGE_SIZE); page = NOPAGE_OOM; @@ -259,8 +260,6 @@ struct page *drm_vm_ttm_nopage(struct vm } ++bm->cur_pages; SetPageLocked(page); - clear_page(kmap(page)); - kunmap(page); } get_page(page); diff --git a/linux-core/drm_compat.h b/linux-core/drm_compat.h index dcda193..ddc255d 100644 --- a/linux-core/drm_compat.h +++ b/linux-core/drm_compat.h @@ -180,16 +180,9 @@ extern void drm_clear_vma(struct vm_area extern pgprot_t vm_get_page_prot(unsigned long vm_flags); -/* - * These are similar to the current kernel gatt pages allocator, only that we - * want a struct page pointer instead of a virtual address. This allows for pages - * that are not in the kernel linear map. - */ - -#define drm_alloc_gatt_pages(order) ({ \ - void *_virt = alloc_gatt_pages(order); \ - ((_virt) ? virt_to_page(_virt) : NULL);}) -#define drm_free_gatt_pages(pages, order) free_gatt_pages(page_address(pages), order) +#ifndef GFP_DMA32 +#define GFP_DMA32 0 +#endif #if defined(CONFIG_X86) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)) diff --git a/linux-core/drm_ttm.c b/linux-core/drm_ttm.c index c32dfcf..1c9b1cf 100644 --- a/linux-core/drm_ttm.c +++ b/linux-core/drm_ttm.c @@ -193,7 +193,7 @@ int drm_destroy_ttm(drm_ttm_t * ttm) * End debugging. */ - drm_free_gatt_pages(*cur_page, 0); + __free_page(*cur_page); drm_free_memctl(PAGE_SIZE); --bm->cur_pages; } @@ -225,7 +225,7 @@ static int drm_ttm_populate(drm_ttm_t * if (drm_alloc_memctl(PAGE_SIZE)) { return -ENOMEM; } - page = drm_alloc_gatt_pages(0); + page = alloc_page(GFP_KERNEL | __GFP_ZERO | GFP_DMA32); if (!page) { drm_free_memctl(PAGE_SIZE); return -ENOMEM; @@ -235,8 +235,6 @@ static int drm_ttm_populate(drm_ttm_t * #else SetPageReserved(page); #endif - clear_page(kmap(page)); - kunmap(page); ttm->pages[i] = page; ++bm->cur_pages; } diff --git a/linux-core/drm_vm.c b/linux-core/drm_vm.c index f36218e..7ac7f3c 100644 --- a/linux-core/drm_vm.c +++ b/linux-core/drm_vm.c @@ -208,7 +208,8 @@ struct page *drm_vm_ttm_fault(struct vm_ data->type = VM_FAULT_OOM; goto out; } - page = ttm->pages[page_offset] = drm_alloc_gatt_pages(0); + page = ttm->pages[page_offset] = + alloc_page(GFP_KERNEL | __GFP_ZERO | GFP_DMA32); if (!page) { drm_free_memctl(PAGE_SIZE); data->type = VM_FAULT_OOM; @@ -220,8 +221,6 @@ struct page *drm_vm_ttm_fault(struct vm_ #else SetPageReserved(page); #endif - clear_page(kmap(page)); - kunmap(page); } if (ttm->page_flags & DRM_TTM_PAGE_UNCACHED) { |
From: <th...@ke...> - 2006-12-27 18:39:04
|
shared-core/via_drm.h | 6 +++--- shared-core/via_verifier.c | 30 +++++++++++++++++++++--------- shared-core/via_verifier.h | 1 + 3 files changed, 25 insertions(+), 12 deletions(-) New commits: diff-tree 2980ec22a165bc71add7464e28a2e56b5c971d20 (from 975136d6e5adc6b6a03719499cf39fbd3f67dc90) Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> Date: Wed Dec 27 19:38:33 2006 +0100 Allow for non-power-of-two texture pitch alignment. diff --git a/shared-core/via_drm.h b/shared-core/via_drm.h index ee92ff6..16421d7 100644 --- a/shared-core/via_drm.h +++ b/shared-core/via_drm.h @@ -42,11 +42,11 @@ * backwards incompatibilities, (which should be avoided whenever possible). */ -#define VIA_DRM_DRIVER_DATE "20060616" +#define VIA_DRM_DRIVER_DATE "20061227" #define VIA_DRM_DRIVER_MAJOR 2 -#define VIA_DRM_DRIVER_MINOR 10 -#define VIA_DRM_DRIVER_PATCHLEVEL 2 +#define VIA_DRM_DRIVER_MINOR 11 +#define VIA_DRM_DRIVER_PATCHLEVEL 0 #define VIA_DRM_DRIVER_VERSION (((VIA_DRM_DRIVER_MAJOR) << 16) | (VIA_DRM_DRIVER_MINOR)) #define VIA_NR_SAREA_CLIPRECTS 8 diff --git a/shared-core/via_verifier.c b/shared-core/via_verifier.c index 1a5edd4..c9723fe 100644 --- a/shared-core/via_verifier.c +++ b/shared-core/via_verifier.c @@ -311,6 +311,7 @@ static __inline__ int finish_current_seq unsigned long lo = ~0, hi = 0, tmp; uint32_t *addr, *pitch, *height, tex; unsigned i; + int npot; if (end > 9) end = 9; @@ -321,12 +322,15 @@ static __inline__ int finish_current_seq &(cur_seq->t_addr[tex = cur_seq->texture][start]); pitch = &(cur_seq->pitch[tex][start]); height = &(cur_seq->height[tex][start]); - + npot = cur_seq->tex_npot[tex]; for (i = start; i <= end; ++i) { tmp = *addr++; if (tmp < lo) lo = tmp; - tmp += (*height++ << *pitch++); + if (i == 0 && npot) + tmp += (*height++ * *pitch++); + else + tmp += (*height++ << *pitch++); if (tmp > hi) hi = tmp; } @@ -448,13 +452,21 @@ investigate_hazard(uint32_t cmd, hazard_ return 0; case check_texture_addr3: cur_seq->unfinished = tex_address; - tmp = ((cmd >> 24) - 0x2B); - cur_seq->pitch[cur_seq->texture][tmp] = - (cmd & 0x00F00000) >> 20; - if (!tmp && (cmd & 0x000FFFFF)) { - DRM_ERROR - ("Unimplemented texture level 0 pitch mode.\n"); - return 2; + tmp = ((cmd >> 24) - HC_SubA_HTXnL0Pit); + if (tmp == 0 && + cmd & HC_HTXnEnPit_MASK) { + cur_seq->pitch[cur_seq->texture][tmp] = + (cmd & HC_HTXnLnPit_MASK); + cur_seq->tex_npot[cur_seq->texture] = 1; + } else { + cur_seq->pitch[cur_seq->texture][tmp] = + (cmd & HC_HTXnLnPitE_MASK) >> HC_HTXnLnPitE_SHIFT; + cur_seq->tex_npot[cur_seq->texture] = 0; + if (cmd & 0x000FFFFF) { + DRM_ERROR + ("Unimplemented texture level 0 pitch mode.\n"); + return 2; + } } return 0; case check_texture_addr4: diff --git a/shared-core/via_verifier.h b/shared-core/via_verifier.h index 96708a3..84497c4 100644 --- a/shared-core/via_verifier.h +++ b/shared-core/via_verifier.h @@ -45,6 +45,7 @@ typedef struct { uint32_t tex_level_lo[2]; uint32_t tex_level_hi[2]; uint32_t tex_palette_size[2]; + uint32_t tex_npot[2]; drm_via_sequence_t unfinished; int agp_texture; int multitex; |
From: <th...@ke...> - 2006-12-27 18:47:04
|
shared-core/via_verifier.c | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) New commits: diff-tree 7859bd61d3d5b5dd69ce978adeae91eaa1e533aa (from 2980ec22a165bc71add7464e28a2e56b5c971d20) Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> Date: Wed Dec 27 19:46:46 2006 +0100 Leftover from previous commit. diff --git a/shared-core/via_verifier.c b/shared-core/via_verifier.c index c9723fe..c80ed81 100644 --- a/shared-core/via_verifier.c +++ b/shared-core/via_verifier.c @@ -454,7 +454,7 @@ investigate_hazard(uint32_t cmd, hazard_ cur_seq->unfinished = tex_address; tmp = ((cmd >> 24) - HC_SubA_HTXnL0Pit); if (tmp == 0 && - cmd & HC_HTXnEnPit_MASK) { + (cmd & HC_HTXnEnPit_MASK)) { cur_seq->pitch[cur_seq->texture][tmp] = (cmd & HC_HTXnLnPit_MASK); cur_seq->tex_npot[cur_seq->texture] = 1; |
From: <th...@ke...> - 2006-12-28 21:17:32
|
shared-core/drm_pciids.txt | 4 +++- shared-core/via_drv.h | 7 ++++--- shared-core/via_irq.c | 18 +++++++++++------- shared-core/via_map.c | 3 +-- shared-core/via_verifier.c | 20 +++++++++++++++----- 5 files changed, 34 insertions(+), 18 deletions(-) New commits: diff-tree a16a8a47cdb04e29f5d8ed05403f21714f7aaf9d (from 7859bd61d3d5b5dd69ce978adeae91eaa1e533aa) Author: Thomas Hellstrom <thomas-at-tungstengraphics-dot-com> Date: Thu Dec 28 22:17:08 2006 +0100 Add some new via chipsets. Disable 3D functionality and AGP DMA for chipsets with the DX9 3D engine. diff --git a/shared-core/drm_pciids.txt b/shared-core/drm_pciids.txt index b6dfe40..0b95fe7 100644 --- a/shared-core/drm_pciids.txt +++ b/shared-core/drm_pciids.txt @@ -219,7 +219,9 @@ 0x1106 0x3122 0 "VIA CLE266" 0x1106 0x7205 0 "VIA KM400" 0x1106 0x3108 0 "VIA K8M800" -0x1106 0x3344 0 "VIA P4VM800PRO" +0x1106 0x3344 0 "VIA CN700 / VM800 / P4M800Pro" +0x1106 0x3343 0 "VIA P4M890" +0x1106 0x3230 VIA_DX9_0 "VIA K8M890" [i810] 0x8086 0x7121 0 "Intel i810 GMCH" diff --git a/shared-core/via_drv.h b/shared-core/via_drv.h index 18d2a33..7a8f2c3 100644 --- a/shared-core/via_drv.h +++ b/shared-core/via_drv.h @@ -83,7 +83,7 @@ typedef struct drm_via_private { char pci_buf[VIA_PCI_BUF_SIZE]; const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE]; uint32_t num_fire_offsets; - int pro_group_a; + int chipset; drm_via_irq_t via_irqs[VIA_NUM_IRQS]; unsigned num_irqs; maskarray_t *irq_masks; @@ -105,8 +105,9 @@ typedef struct drm_via_private { } drm_via_private_t; enum via_family { - VIA_OTHER = 0, - VIA_PRO_GROUP_A, + VIA_OTHER = 0, /* Baseline */ + VIA_PRO_GROUP_A, /* Another video engine and DMA commands */ + VIA_DX9_0 /* Same video as pro_group_a, but 3D is unsupported */ }; /* VIA MMIO register access */ diff --git a/shared-core/via_irq.c b/shared-core/via_irq.c index db60b28..2ac8697 100644 --- a/shared-core/via_irq.c +++ b/shared-core/via_irq.c @@ -267,13 +267,17 @@ void via_driver_irq_preinstall(drm_devic dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE; dev_priv->irq_pending_mask = VIA_IRQ_VBLANK_PENDING; - dev_priv->irq_masks = (dev_priv->pro_group_a) ? - via_pro_group_a_irqs : via_unichrome_irqs; - dev_priv->num_irqs = (dev_priv->pro_group_a) ? - via_num_pro_group_a : via_num_unichrome; - dev_priv->irq_map = (dev_priv->pro_group_a) ? - via_irqmap_pro_group_a : via_irqmap_unichrome; - + if (dev_priv->chipset == VIA_PRO_GROUP_A || + dev_priv->chipset == VIA_DX9_0) { + dev_priv->irq_masks = via_pro_group_a_irqs; + dev_priv->num_irqs = via_num_pro_group_a; + dev_priv->irq_map = via_irqmap_pro_group_a; + } else { + dev_priv->irq_masks = via_unichrome_irqs; + dev_priv->num_irqs = via_num_unichrome; + dev_priv->irq_map = via_irqmap_unichrome; + } + for(i=0; i < dev_priv->num_irqs; ++i) { atomic_set(&cur_irq->irq_received, 0); cur_irq->enable_mask = dev_priv->irq_masks[i][0]; diff --git a/shared-core/via_map.c b/shared-core/via_map.c index 71967d6..a37f5fd 100644 --- a/shared-core/via_map.c +++ b/shared-core/via_map.c @@ -107,8 +107,7 @@ int via_driver_load(drm_device_t *dev, u dev->dev_private = (void *)dev_priv; - if (chipset == VIA_PRO_GROUP_A) - dev_priv->pro_group_a = 1; + dev_priv->chipset = chipset; #ifdef VIA_HAVE_CORE_MM ret = drm_sman_init(&dev_priv->sman, 2, 12, 8); diff --git a/shared-core/via_verifier.c b/shared-core/via_verifier.c index c80ed81..b5a1d33 100644 --- a/shared-core/via_verifier.c +++ b/shared-core/via_verifier.c @@ -978,7 +978,13 @@ via_verify_command_stream(const uint32_t uint32_t cmd; const uint32_t *buf_end = buf + (size >> 2); verifier_state_t state = state_command; - int pro_group_a = dev_priv->pro_group_a; + int cme_video; + int supported_3d; + + cme_video = (dev_priv->chipset == VIA_PRO_GROUP_A || + dev_priv->chipset == VIA_DX9_0); + + supported_3d = dev_priv->chipset != VIA_DX9_0; hc_state->dev = dev; hc_state->unfinished = no_sequence; @@ -1003,17 +1009,21 @@ via_verify_command_stream(const uint32_t state = via_check_vheader6(&buf, buf_end); break; case state_command: - if (HALCYON_HEADER2 == (cmd = *buf)) + if ((HALCYON_HEADER2 == (cmd = *buf)) && + supported_3d) state = state_header2; else if ((cmd & HALCYON_HEADER1MASK) == HALCYON_HEADER1) state = state_header1; - else if (pro_group_a + else if (cme_video && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER5) state = state_vheader5; - else if (pro_group_a + else if (cme_video && (cmd & VIA_VIDEOMASK) == VIA_VIDEO_HEADER6) state = state_vheader6; - else { + else if ((cmd == HALCYON_HEADER2) && !supported_3d) { + DRM_ERROR("Accelerated 3D is not supported on this chipset yet.\n"); + state = state_error; + } else { DRM_ERROR ("Invalid / Unimplemented DMA HEADER command. 0x%x\n", cmd); |
From: <ai...@ke...> - 2007-01-01 00:23:35
|
linux-core/drm_stub.c | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) New commits: diff-tree 87faf62fae711c8337793abaf0f529f2660245db (from a16a8a47cdb04e29f5d8ed05403f21714f7aaf9d) Author: Dave Airlie <ai...@li...> Date: Mon Jan 1 11:22:35 2007 +1100 fixup permission along line of kernel diff --git a/linux-core/drm_stub.c b/linux-core/drm_stub.c index e9d0ac6..60123cd 100644 --- a/linux-core/drm_stub.c +++ b/linux-core/drm_stub.c @@ -47,8 +47,8 @@ MODULE_LICENSE("GPL and additional right MODULE_PARM_DESC(cards_limit, "Maximum number of graphics cards"); MODULE_PARM_DESC(debug, "Enable debug output"); -module_param_named(cards_limit, drm_cards_limit, int, S_IRUGO); -module_param_named(debug, drm_debug, int, S_IRUGO|S_IWUGO); +module_param_named(cards_limit, drm_cards_limit, int, 0444); +module_param_named(debug, drm_debug, int, 0600); drm_head_t **drm_heads; struct drm_sysfs_class *drm_class; |
From: <ai...@ke...> - 2007-01-01 00:33:09
|
linux-core/drmP.h | 4 ++++ linux-core/drm_bo.c | 14 ++++++++++++++ linux-core/drm_compat.h | 4 ++-- linux-core/drm_vm.c | 6 +++--- linux-core/via_dmablit.c | 14 +++++++++++++- 5 files changed, 36 insertions(+), 6 deletions(-) New commits: diff-tree 2dcbf6a59918761cffb27e027b1235c551ed03dd (from 87faf62fae711c8337793abaf0f529f2660245db) Author: Dave Airlie <ai...@li...> Date: Mon Jan 1 11:30:38 2007 +1100 make build against 2.6.20 hopefully diff --git a/linux-core/drmP.h b/linux-core/drmP.h index 77212d1..ecb0318 100644 --- a/linux-core/drmP.h +++ b/linux-core/drmP.h @@ -794,7 +794,11 @@ typedef struct drm_buffer_manager{ struct list_head pinned[DRM_BO_MEM_TYPES]; struct list_head unfenced; struct list_head ddestroy; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) struct work_struct wq; +#else + struct delayed_work wq; +#endif uint32_t fence_type; unsigned long cur_pages; atomic_t count; diff --git a/linux-core/drm_bo.c b/linux-core/drm_bo.c index 65e24fb..c0e431b 100644 --- a/linux-core/drm_bo.c +++ b/linux-core/drm_bo.c @@ -352,10 +352,20 @@ static void drm_bo_delayed_delete(drm_de } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) static void drm_bo_delayed_workqueue(void *data) +#else +static void drm_bo_delayed_workqueue(struct work_struct *work) +#endif { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) drm_device_t *dev = (drm_device_t *) data; drm_buffer_manager_t *bm = &dev->bm; +#else + drm_buffer_manager_t *bm = container_of(work, drm_buffer_manager_t, wq.work); + drm_device_t *dev = container_of(bm, drm_device_t, bm); +#endif + DRM_DEBUG("Delayed delete Worker\n"); @@ -1904,7 +1914,11 @@ int drm_bo_driver_init(drm_device_t * de if (ret) goto out_unlock; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) INIT_WORK(&bm->wq, &drm_bo_delayed_workqueue, dev); +#else + INIT_DELAYED_WORK(&bm->wq, drm_bo_delayed_workqueue); +#endif bm->initialized = 1; bm->nice_mode = 1; atomic_set(&bm->count, 0); diff --git a/linux-core/drm_compat.h b/linux-core/drm_compat.h index ddc255d..3cb5d20 100644 --- a/linux-core/drm_compat.h +++ b/linux-core/drm_compat.h @@ -158,7 +158,7 @@ static __inline__ void *kcalloc(size_t n #include <linux/mm.h> #include <asm/page.h> -#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)) && \ +#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) && \ (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15))) #define DRM_ODD_MM_COMPAT #endif @@ -208,7 +208,7 @@ extern struct page *drm_vm_ttm_fault(str #endif -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) /* * Hopefully, real NOPAGE_RETRY functionality will be in 2.6.19. diff --git a/linux-core/drm_vm.c b/linux-core/drm_vm.c index 7ac7f3c..2413016 100644 --- a/linux-core/drm_vm.c +++ b/linux-core/drm_vm.c @@ -159,9 +159,9 @@ static __inline__ struct page *drm_do_vm } #endif /* __OS_HAS_AGP */ -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20) || \ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21) || \ LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15)) -#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20)) +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)) static #endif struct page *drm_vm_ttm_fault(struct vm_area_struct *vma, @@ -508,7 +508,7 @@ static struct vm_operations_struct drm_v .close = drm_vm_close, }; -#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20)) +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21)) static struct vm_operations_struct drm_vm_ttm_ops = { .nopage = drm_vm_ttm_nopage, .open = drm_vm_ttm_open_wrapper, diff --git a/linux-core/via_dmablit.c b/linux-core/via_dmablit.c index 1fb902c..2f50837 100644 --- a/linux-core/via_dmablit.c +++ b/linux-core/via_dmablit.c @@ -498,10 +498,18 @@ via_dmablit_timer(unsigned long data) static void +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) via_dmablit_workqueue(void *data) +#else +via_dmablit_workqueue(struct work_struct *work) +#endif { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) drm_via_blitq_t *blitq = (drm_via_blitq_t *) data; - drm_device_t *dev = blitq->dev; +#else + drm_via_blitq_t *blitq = container_of(work, drm_via_blitq_t, wq); +#endif + drm_device_t *dev = blitq->dev; unsigned long irqsave; drm_via_sg_info_t *cur_sg; int cur_released; @@ -569,7 +577,11 @@ via_init_dmablit(drm_device_t *dev) DRM_INIT_WAITQUEUE(blitq->blit_queue + j); } DRM_INIT_WAITQUEUE(&blitq->busy_queue); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) INIT_WORK(&blitq->wq, via_dmablit_workqueue, blitq); +#else + INIT_WORK(&blitq->wq, via_dmablit_workqueue); +#endif init_timer(&blitq->poll_timer); blitq->poll_timer.function = &via_dmablit_timer; blitq->poll_timer.data = (unsigned long) blitq; |
From: <dar...@ke...> - 2007-01-02 05:35:11
|
shared-core/nouveau_fifo.c | 3 +++ 1 files changed, 3 insertions(+) New commits: diff-tree 91855bb2540bbb824d4d5d437f3eb2d5d06c11ba (from 861017e6d50f5724c179717f995322c498ee15db) Author: Ben Skeggs <dar...@ii...> Date: Tue Jan 2 16:35:00 2007 +1100 nouveau: oops, forgot to free RAMIN.. diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c index 15d2d92..9f8c740 100644 --- a/shared-core/nouveau_fifo.c +++ b/shared-core/nouveau_fifo.c @@ -590,6 +590,9 @@ void nouveau_fifo_free(drm_device_t* dev NV_WRITE(NV_RAMIN + dev_priv->ramfc_offset + n*ctx_size + i, 0); } + if (dev_priv->card_type >= NV_40) + nouveau_instmem_free(dev, dev_priv->fifos[n].ramin_grctx); + /* reenable the fifo caches */ NV_WRITE(NV_PFIFO_CACHES, 0x00000001); |
From: <ma...@ke...> - 2007-01-05 18:35:37
|
shared-core/nouveau_fifo.c | 23 ++++++++++++----------- shared-core/nouveau_reg.h | 5 +++++ 2 files changed, 17 insertions(+), 11 deletions(-) New commits: diff-tree f80659bc2967dbed4aed0d44a550bb4a9e4569b5 (from 4fe2858f53c6ea542cd81961ebdad118acfc8f32) Author: Stephane Marchesin <mar...@ic...> Date: Fri Jan 5 19:37:06 2007 +0100 Cleanup the nv04 fifo code a bit. diff --git a/shared-core/nouveau_fifo.c b/shared-core/nouveau_fifo.c index 9f8c740..ebaa5b8 100644 --- a/shared-core/nouveau_fifo.c +++ b/shared-core/nouveau_fifo.c @@ -267,31 +267,32 @@ nouveau_fifo_cmdbuf_alloc(struct drm_dev return 0; } -static void nouveau_context_init(drm_device_t *dev, +#define RAMFC_WR(offset, val) NV_WRITE(fifoctx + NV04_RAMFC_##offset, (val)) +static void nouveau_nv04_context_init(drm_device_t *dev, drm_nouveau_fifo_alloc_t *init) { drm_nouveau_private_t *dev_priv = dev->dev_private; struct nouveau_object *cb_obj; - uint32_t ctx_addr, ctx_size = 32; + uint32_t fifoctx, ctx_size = 32; int i; cb_obj = dev_priv->fifos[init->channel].cmdbuf_obj; - ctx_addr=NV_RAMIN+dev_priv->ramfc_offset+init->channel*ctx_size; + fifoctx=NV_RAMIN+dev_priv->ramfc_offset+init->channel*ctx_size; // clear the fifo context for(i=0;i<ctx_size/4;i++) - NV_WRITE(ctx_addr+4*i,0x0); + NV_WRITE(fifoctx+4*i,0x0); - NV_WRITE(ctx_addr,init->put_base); - NV_WRITE(ctx_addr+4,init->put_base); - // that's what is done in nvosdk, but that part of the code is buggy so... - NV_WRITE(ctx_addr+8, nouveau_chip_instance_get(dev, cb_obj->instance)); + RAMFC_WR(DMA_PUT , init->put_base); + RAMFC_WR(DMA_GET , init->put_base); + RAMFC_WR(DMA_INSTANCE , nouveau_chip_instance_get(dev, cb_obj->instance)); #ifdef __BIG_ENDIAN - NV_WRITE(ctx_addr+16,NV_PFIFO_CACH1_DMAF_TRIG_112_BYTES|NV_PFIFO_CACH1_DMAF_SIZE_128_BYTES|NV_PFIFO_CACH1_DMAF_MAX_REQS_4|NV_PFIFO_CACH1_BIG_ENDIAN); + RAMFC_WR(DMA_FETCH, NV_PFIFO_CACH1_DMAF_TRIG_112_BYTES|NV_PFIFO_CACH1_DMAF_SIZE_128_BYTES|NV_PFIFO_CACH1_DMAF_MAX_REQS_4|NV_PFIFO_CACH1_BIG_ENDIAN); #else - NV_WRITE(ctx_addr+16,NV_PFIFO_CACH1_DMAF_TRIG_112_BYTES|NV_PFIFO_CACH1_DMAF_SIZE_128_BYTES|NV_PFIFO_CACH1_DMAF_MAX_REQS_4); + RAMFC_WR(DMA_FETCH, NV_PFIFO_CACH1_DMAF_TRIG_112_BYTES|NV_PFIFO_CACH1_DMAF_SIZE_128_BYTES|NV_PFIFO_CACH1_DMAF_MAX_REQS_4); #endif } +#undef RAMFC_WR #define RAMFC_WR(offset, val) NV_WRITE(fifoctx + NV10_RAMFC_##offset, (val)) static void nouveau_nv10_context_init(drm_device_t *dev, @@ -499,7 +500,7 @@ static int nouveau_fifo_alloc(drm_device /* Construct inital RAMFC for new channel */ if (dev_priv->card_type < NV_10) { - nouveau_context_init(dev, init); + nouveau_nv04_context_init(dev, init); } else if (dev_priv->card_type < NV_40) { nouveau_nv10_context_init(dev, init); } else { diff --git a/shared-core/nouveau_reg.h b/shared-core/nouveau_reg.h index e56630f..38a2206 100644 --- a/shared-core/nouveau_reg.h +++ b/shared-core/nouveau_reg.h @@ -194,6 +194,11 @@ #define NV03_FIFO_CMD_REWIND (NV03_FIFO_CMD_JUMP | (0 & NV03_FIFO_CMD_JUMP_OFFSET_MASK)) /* RAMFC offsets */ +#define NV04_RAMFC_DMA_PUT 0x00 +#define NV04_RAMFC_DMA_GET 0x04 +#define NV04_RAMFC_DMA_INSTANCE 0x08 +#define NV04_RAMFC_DMA_FETCH 0x16 + #define NV10_RAMFC_DMA_PUT 0x00 #define NV10_RAMFC_DMA_GET 0x04 #define NV10_RAMFC_REF_CNT 0x08 |
From: <ma...@ke...> - 2007-01-05 19:57:47
|
shared-core/nouveau_state.c | 4 ---- 1 files changed, 4 deletions(-) New commits: diff-tree 528ab8ce4038397c043b05a46f95c666a985f7a3 (from d99c7c27e2df1a7093f3d2f5c7d196f58bfe1647) Author: Stephane Marchesin <mar...@ic...> Date: Fri Jan 5 20:59:45 2007 +0100 nouveau: oops, we don't need OS_HAS_MTRR actually. diff --git a/shared-core/nouveau_state.c b/shared-core/nouveau_state.c index 2d0f798..43f9c2a 100644 --- a/shared-core/nouveau_state.c +++ b/shared-core/nouveau_state.c @@ -71,10 +71,8 @@ int nouveau_firstopen(struct drm_device ret = nouveau_fifo_init(dev); if (ret) return ret; -#if __OS_HAS_MTRR /* setup a mtrr over the FB */ dev_priv->fb_mtrr=drm_mtrr_add(drm_get_resource_start(dev, 1),nouveau_mem_fb_amount(dev), DRM_MTRR_WC); -#endif /* FIXME: doesn't belong here, and have no idea what it's for.. */ if (dev_priv->card_type >= NV_40) @@ -105,11 +103,9 @@ int nouveau_load(struct drm_device *dev, void nouveau_lastclose(struct drm_device *dev) { -#if __OS_HAS_MTRR drm_nouveau_private_t *dev_priv = dev->dev_private; if(dev_priv->fb_mtrr>0) drm_mtrr_del(dev_priv->fb_mtrr, drm_get_resource_start(dev, 1),nouveau_mem_fb_amount(dev), DRM_MTRR_WC); -#endif } int nouveau_unload(struct drm_device *dev) |
From: <ke...@ke...> - 2007-01-07 00:22:13
|
shared-core/i915_dma.c | 56 +++++++++++++++++++++++++++++++++++++++++++++++++ shared-core/i915_drm.h | 29 +++++++++++++++++++++++++ 2 files changed, 85 insertions(+) New commits: diff-tree f7180349fde6947e229ecde17215c2984e6e883b (from 1f1714cf3dd24ea4109722ea2b47bcf4725f27ea) Author: Zou Nan hai <nan...@in...> Date: Mon Dec 4 15:48:04 2006 +0800 i915: ARB_Occlusion_query(MMIO ioctl) support. This adds a new ioctl for passing counter information from the chip back to applications, these counters include the data needed to perform OC. diff --git a/shared-core/i915_dma.c b/shared-core/i915_dma.c index 3373f1b..943a177 100644 --- a/shared-core/i915_dma.c +++ b/shared-core/i915_dma.c @@ -775,6 +775,61 @@ static int i915_setparam(DRM_IOCTL_ARGS) return 0; } +drm_i915_mmio_entry_t mmio_table[] = { + [MMIO_REGS_PS_DEPTH_COUNT] = { + I915_MMIO_MAY_READ|I915_MMIO_MAY_WRITE, + 0x2350, + 8 + } +}; + +static int mmio_table_size = sizeof(mmio_table)/sizeof(drm_i915_mmio_entry_t); + +static int i915_mmio(DRM_IOCTL_ARGS) +{ + char buf[32]; + DRM_DEVICE; + drm_i915_private_t *dev_priv = dev->dev_private; + drm_i915_mmio_entry_t *e; + drm_i915_mmio_t mmio; + void __iomem *base; + if (!dev_priv) { + DRM_ERROR("%s called with no initialization\n", __FUNCTION__); + return DRM_ERR(EINVAL); + } + DRM_COPY_FROM_USER_IOCTL(mmio, (drm_i915_setparam_t __user *) data, + sizeof(mmio)); + + if (mmio.reg >= mmio_table_size) + return DRM_ERR(EINVAL); + + e = &mmio_table[mmio.reg]; + base = dev_priv->mmio_map->handle + e->offset; + + switch (mmio.read_write) { + case I915_MMIO_READ: + if (!(e->flag & I915_MMIO_MAY_READ)) + return DRM_ERR(EINVAL); + memcpy_fromio(buf, base, e->size); + if (DRM_COPY_TO_USER(mmio.data, buf, e->size)) { + DRM_ERROR("DRM_COPY_TO_USER failed\n"); + return DRM_ERR(EFAULT); + } + break; + + case I915_MMIO_WRITE: + if (!(e->flag & I915_MMIO_MAY_WRITE)) + return DRM_ERR(EINVAL); + if(DRM_COPY_FROM_USER(buf, mmio.data, e->size)) { + DRM_ERROR("DRM_COPY_TO_USER failed\n"); + return DRM_ERR(EFAULT); + } + memcpy_toio(base, buf, e->size); + break; + } + return 0; +} + int i915_driver_load(drm_device_t *dev, unsigned long flags) { /* i915 has 4 more counters */ @@ -824,6 +879,7 @@ drm_ioctl_desc_t i915_ioctls[] = { [DRM_IOCTL_NR(DRM_I915_SET_VBLANK_PIPE)] = { i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY }, [DRM_IOCTL_NR(DRM_I915_GET_VBLANK_PIPE)] = { i915_vblank_pipe_get, DRM_AUTH }, [DRM_IOCTL_NR(DRM_I915_VBLANK_SWAP)] = {i915_vblank_swap, DRM_AUTH}, + [DRM_IOCTL_NR(DRM_I915_MMIO)] = {i915_mmio, DRM_AUTH}, }; int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); diff --git a/shared-core/i915_drm.h b/shared-core/i915_drm.h index 9eec109..22a81d1 100644 --- a/shared-core/i915_drm.h +++ b/shared-core/i915_drm.h @@ -152,6 +152,7 @@ typedef struct _drm_i915_sarea { #define DRM_I915_SET_VBLANK_PIPE 0x0d #define DRM_I915_GET_VBLANK_PIPE 0x0e #define DRM_I915_VBLANK_SWAP 0x0f +#define DRM_I915_MMIO 0x10 #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) @@ -273,4 +274,32 @@ typedef struct drm_i915_vblank_swap { unsigned int sequence; } drm_i915_vblank_swap_t; +#define I915_MMIO_READ 0 +#define I915_MMIO_WRITE 1 + +#define I915_MMIO_MAY_READ 0x1 +#define I915_MMIO_MAY_WRITE 0x2 + +#define MMIO_REGS_IA_PRIMATIVES_COUNT 0 +#define MMIO_REGS_IA_VERTICES_COUNT 1 +#define MMIO_REGS_VS_INVOCATION_COUNT 2 +#define MMIO_REGS_GS_PRIMITIVES_COUNT 3 +#define MMIO_REGS_GS_INVOCATION_COUNT 4 +#define MMIO_REGS_CL_PRIMITIVES_COUNT 5 +#define MMIO_REGS_CL_INVOCATION_COUNT 6 +#define MMIO_REGS_PS_INVOCATION_COUNT 7 +#define MMIO_REGS_PS_DEPTH_COUNT 8 + +typedef struct drm_i915_mmio_entry { + unsigned int flag; + unsigned int offset; + unsigned int size; +}drm_i915_mmio_entry_t; + +typedef struct drm_i915_mmio { + unsigned int read_write:1; + unsigned int reg:31; + void __user *data; +} drm_i915_mmio_t; + #endif /* _I915_DRM_H_ */ |
From: <ke...@ke...> - 2007-01-07 00:26:59
|
shared-core/i915_drv.h | 3 ++- 1 files changed, 2 insertions(+), 1 deletion(-) New commits: diff-tree 2851c9f5c6c6847151d011d68ec00897ac9d9634 (from f7180349fde6947e229ecde17215c2984e6e883b) Author: Wang Zhenyu <zhe...@in...> Date: Mon Dec 4 15:48:04 2006 +0800 Bump i915 minor for ARB_OC ioctl diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h index 85804ce..57cdf38 100644 --- a/shared-core/i915_drv.h +++ b/shared-core/i915_drv.h @@ -48,9 +48,10 @@ * 1.5: Add vblank pipe configuration * 1.6: - New ioctl for scheduling buffer swaps on vertical blank * - Support vertical blank on secondary display pipe + * 1.8: New ioctl for ARB_Occlusion_Query */ #define DRIVER_MAJOR 1 -#define DRIVER_MINOR 7 +#define DRIVER_MINOR 8 #define DRIVER_PATCHLEVEL 0 #if defined(__linux__) |
From: <ke...@ke...> - 2007-01-07 01:46:33
|
shared-core/i915_drv.h | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) New commits: diff-tree 31daf669624c35bdf686aaeea7d7844d0cb5141a (from 2851c9f5c6c6847151d011d68ec00897ac9d9634) Author: Keith Packard <ke...@ma...> Date: Sat Jan 6 17:40:50 2007 -0800 Revert i915 drm driver name to i915; miniglx doesn't work otherwise Yes, this driver supports the new memory manager, that is indicated by the version number being >= 1.7. diff --git a/shared-core/i915_drv.h b/shared-core/i915_drv.h index 57cdf38..98f5894 100644 --- a/shared-core/i915_drv.h +++ b/shared-core/i915_drv.h @@ -35,7 +35,7 @@ #define DRIVER_AUTHOR "Tungsten Graphics, Inc." -#define DRIVER_NAME "i915-mm" +#define DRIVER_NAME "i915" #define DRIVER_DESC "Intel Graphics" #define DRIVER_DATE "20060929" |
From: <dar...@ke...> - 2007-01-08 01:48:28
|
shared-core/nv40_graph.c | 193 +++++++++++++++++++++++++++++++++++++++++++---- 1 files changed, 177 insertions(+), 16 deletions(-) New commits: diff-tree 128d87a3dd26b1c633dac3fe0f0d5e9190f11d53 (from b147c3926352e4dcb9dbf53b8b12baae8ce34254) Author: Ben Skeggs <dar...@ii...> Date: Mon Jan 8 12:47:22 2007 +1100 nouveau: nv43 context stuff diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c index 77af37f..45c451f 100644 --- a/shared-core/nv40_graph.c +++ b/shared-core/nv40_graph.c @@ -9,7 +9,8 @@ * between the contexts */ #define NV40_GRCTX_SIZE (175*1024) -#define NV44_GRCTX_SIZE (25*1024) +#define NV43_GRCTX_SIZE (70*1024) +#define NV4E_GRCTX_SIZE (25*1024) /*TODO: deciper what each offset in the context represents. The below * contexts are taken from dumps just after the 3D object is @@ -155,7 +156,123 @@ static void nv40_graph_context_init(drm_ INSTANCE_WR(ctx, i/4, 0x3f800000); } -static void nv44_graph_context_init(drm_device_t *dev, struct mem_block *ctx) +static void +nv43_graph_context_init(drm_device_t *dev, struct mem_block *ctx) +{ + drm_nouveau_private_t *dev_priv = dev->dev_private; + int i; + + INSTANCE_WR(ctx, 0x00000/4, nouveau_chip_instance_get(dev, ctx)); + INSTANCE_WR(ctx, 0x00024/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x00028/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x00030/4, 0x00000001); + INSTANCE_WR(ctx, 0x0011c/4, 0x20010001); + INSTANCE_WR(ctx, 0x00120/4, 0x0f73ef00); + INSTANCE_WR(ctx, 0x00128/4, 0x02008821); + INSTANCE_WR(ctx, 0x00178/4, 0x00000040); + INSTANCE_WR(ctx, 0x0017c/4, 0x00000040); + INSTANCE_WR(ctx, 0x00180/4, 0x00000040); + INSTANCE_WR(ctx, 0x00188/4, 0x00000040); + INSTANCE_WR(ctx, 0x00194/4, 0x80000000); + INSTANCE_WR(ctx, 0x00198/4, 0x80000000); + INSTANCE_WR(ctx, 0x0019c/4, 0x80000000); + INSTANCE_WR(ctx, 0x001a0/4, 0x80000000); + INSTANCE_WR(ctx, 0x001a4/4, 0x80000000); + INSTANCE_WR(ctx, 0x001a8/4, 0x80000000); + INSTANCE_WR(ctx, 0x001ac/4, 0x80000000); + INSTANCE_WR(ctx, 0x001b0/4, 0x80000000); + INSTANCE_WR(ctx, 0x001d0/4, 0x0b0b0b0c); + INSTANCE_WR(ctx, 0x00340/4, 0x00040000); + INSTANCE_WR(ctx, 0x00350/4, 0x55555555); + INSTANCE_WR(ctx, 0x00354/4, 0x55555555); + INSTANCE_WR(ctx, 0x00358/4, 0x55555555); + INSTANCE_WR(ctx, 0x0035c/4, 0x55555555); + INSTANCE_WR(ctx, 0x00388/4, 0x00000008); + INSTANCE_WR(ctx, 0x0039c/4, 0x00001010); + INSTANCE_WR(ctx, 0x003cc/4, 0x00000111); + INSTANCE_WR(ctx, 0x003d0/4, 0x00080060); + INSTANCE_WR(ctx, 0x003ec/4, 0x00000080); + INSTANCE_WR(ctx, 0x003f0/4, 0xffff0000); + INSTANCE_WR(ctx, 0x003f4/4, 0x00000001); + INSTANCE_WR(ctx, 0x00408/4, 0x46400000); + INSTANCE_WR(ctx, 0x00418/4, 0xffff0000); + INSTANCE_WR(ctx, 0x00424/4, 0x0fff0000); + INSTANCE_WR(ctx, 0x00428/4, 0x0fff0000); + INSTANCE_WR(ctx, 0x00430/4, 0x00011100); + for (i=0x0044c; i<=0x00488; i+=4) + INSTANCE_WR(ctx, i/4, 0x07ff0000); + INSTANCE_WR(ctx, 0x00494/4, 0x4b7fffff); + INSTANCE_WR(ctx, 0x004bc/4, 0x30201000); + INSTANCE_WR(ctx, 0x004c0/4, 0x70605040); + INSTANCE_WR(ctx, 0x004c4/4, 0xb8a89888); + INSTANCE_WR(ctx, 0x004c8/4, 0xf8e8d8c8); + INSTANCE_WR(ctx, 0x004dc/4, 0x40100000); + INSTANCE_WR(ctx, 0x004f8/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x0052c/4, 0x435185d6); + INSTANCE_WR(ctx, 0x00530/4, 0x2155b699); + INSTANCE_WR(ctx, 0x00534/4, 0xfedcba98); + INSTANCE_WR(ctx, 0x00538/4, 0x00000098); + INSTANCE_WR(ctx, 0x00548/4, 0xffffffff); + INSTANCE_WR(ctx, 0x0054c/4, 0x00ff7000); + INSTANCE_WR(ctx, 0x00550/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x00560/4, 0x00ff0000); + INSTANCE_WR(ctx, 0x00598/4, 0x00ffff00); + for (i=0x005dc; i<=0x00618; i+=4) + INSTANCE_WR(ctx, i/4, 0x00018488); + for (i=0x0061c; i<=0x00658; i+=4) + INSTANCE_WR(ctx, i/4, 0x00028202); + for (i=0x0069c; i<=0x006d8; i+=4) + INSTANCE_WR(ctx, i/4, 0x0000aae4); + for (i=0x006dc; i<=0x00718; i+=4) + INSTANCE_WR(ctx, i/4, 0x01012000); + for (i=0x0071c; i<=0x00758; i+=4) + INSTANCE_WR(ctx, i/4, 0x00080008); + for (i=0x0079c; i<=0x007d8; i+=4) + INSTANCE_WR(ctx, i/4, 0x00100008); + for (i=0x0082c; i<=0x00838; i+=4) + INSTANCE_WR(ctx, i/4, 0x0001bc80); + for (i=0x0083c; i<=0x00848; i+=4) + INSTANCE_WR(ctx, i/4, 0x00000202); + for (i=0x0085c; i<=0x00868; i+=4) + INSTANCE_WR(ctx, i/4, 0x00000008); + for (i=0x0087c; i<=0x00888; i+=4) + INSTANCE_WR(ctx, i/4, 0x00080008); + INSTANCE_WR(ctx, 0x0089c/4, 0x00000002); + INSTANCE_WR(ctx, 0x008d0/4, 0x00000021); + INSTANCE_WR(ctx, 0x008d4/4, 0x030c30c3); + INSTANCE_WR(ctx, 0x008e0/4, 0x3e020200); + INSTANCE_WR(ctx, 0x008e4/4, 0x00ffffff); + INSTANCE_WR(ctx, 0x008e8/4, 0x0c103f00); + INSTANCE_WR(ctx, 0x008f4/4, 0x00020000); + INSTANCE_WR(ctx, 0x0092c/4, 0x00008100); + INSTANCE_WR(ctx, 0x009b8/4, 0x00000001); + INSTANCE_WR(ctx, 0x009fc/4, 0x00001001); + INSTANCE_WR(ctx, 0x00a04/4, 0x00000003); + INSTANCE_WR(ctx, 0x00a08/4, 0x00888001); + INSTANCE_WR(ctx, 0x00a8c/4, 0x00000005); + INSTANCE_WR(ctx, 0x00a98/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x00ab4/4, 0x00005555); + INSTANCE_WR(ctx, 0x00ab8/4, 0x00005555); + INSTANCE_WR(ctx, 0x00abc/4, 0x00005555); + INSTANCE_WR(ctx, 0x00ac0/4, 0x00000001); + INSTANCE_WR(ctx, 0x00af8/4, 0x00000001); + for (i=0x02ec0; i<=0x02f38; i+=8) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x04c80; i<=0x06e70; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x06e80; i<=0x07270; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x096c0; i<=0x0b8b0; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x0b8c0; i<=0x0bcb0; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x0e100; i<=0x102f0; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x10300; i<=0x106f0; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); +}; + +static void nv4e_graph_context_init(drm_device_t *dev, struct mem_block *ctx) { drm_nouveau_private_t *dev_priv = dev->dev_private; int i; @@ -267,13 +384,30 @@ nv40_graph_context_create(drm_device_t * drm_nouveau_private_t *dev_priv = (drm_nouveau_private_t *)dev->dev_private; struct nouveau_fifo *chan = &dev_priv->fifos[channel]; + void (*ctx_init)(drm_device_t *, struct mem_block *); unsigned int ctx_size; - int i; + int i, chipset; - if (dev_priv->card_type == NV_40) + chipset = (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000) >> 24; + + switch (chipset) { + case 0x40: + ctx_size = NV40_GRCTX_SIZE; + ctx_init = nv40_graph_context_init; + break; + case 0x43: + ctx_size = NV43_GRCTX_SIZE; + ctx_init = nv43_graph_context_init; + break; + case 0x4e: + ctx_size = NV4E_GRCTX_SIZE; + ctx_init = nv4e_graph_context_init; + break; + default: ctx_size = NV40_GRCTX_SIZE; - else - ctx_size = NV44_GRCTX_SIZE; + ctx_init = nv40_graph_context_init; + break; + } /* Alloc and clear RAMIN to store the context */ chan->ramin_grctx = nouveau_instmem_alloc(dev, ctx_size, 4); @@ -283,14 +417,7 @@ nv40_graph_context_create(drm_device_t * INSTANCE_WR(chan->ramin_grctx, i/4, 0x00000000); /* Initialise default context values */ - if (dev_priv->card_type == NV_40) - nv40_graph_context_init(dev, chan->ramin_grctx); - else { - /*XXX: this context was pulled from a c51 card. no idea if it - * is usable on a "real" nv44... - */ - nv44_graph_context_init(dev, chan->ramin_grctx); - } + ctx_init(dev, chan->ramin_grctx); return 0; } @@ -430,7 +557,40 @@ static uint32_t nv40_ctx_voodoo[] = { ~0 }; -static uint32_t c51_ctx_voodoo[] = { +static uint32_t nv43_ctx_voodoo[] = { + 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, + 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409565, 0x00409a06, + 0x0040a868, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080, + 0x004014e6, 0x007000a0, 0x00401a84, 0x00700082, 0x00600001, 0x00500061, + 0x00600002, 0x00401b68, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d, + 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4, + 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e, + 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143, + 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10, + 0x001046ec, 0x00500060, 0x00403a87, 0x0060000d, 0x00407ce6, 0x002000f1, + 0x0060000a, 0x00148653, 0x00104668, 0x0010c66d, 0x00120682, 0x0011068b, + 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6, + 0x00200020, 0x001006cc, 0x001046ed, 0x001246f0, 0x002000c0, 0x00100700, + 0x0010c3d7, 0x001043e1, 0x00500060, 0x00405800, 0x00405884, 0x00600003, + 0x00500067, 0x00600008, 0x00500060, 0x00700082, 0x00200233, 0x0060000a, + 0x00104800, 0x00108901, 0x00124920, 0x0020001f, 0x00100940, 0x00140965, + 0x00148a00, 0x00108a14, 0x00160b00, 0x00134b2c, 0x0010cd00, 0x0010cd04, + 0x0010cd08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00, 0x00104f06, + 0x002002c8, 0x0060000a, 0x00300000, 0x00200680, 0x00407200, 0x00200684, + 0x00800001, 0x00200b10, 0x0060000a, 0x00203870, 0x0040788a, 0x00201350, + 0x00800041, 0x00407c84, 0x00201560, 0x00800002, 0x00408d00, 0x00600006, + 0x00700003, 0x004086e6, 0x00700080, 0x002002c8, 0x0060000a, 0x00200004, + 0x00800001, 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x0040a884, + 0x00700002, 0x00600004, 0x0040a868, 0x00700000, 0x00200000, 0x0060000a, + 0x00106002, 0x00700080, 0x00400a84, 0x00700002, 0x00400a68, 0x00500060, + 0x00600007, 0x00409988, 0x0060000f, 0x00000000, 0x00500060, 0x00200000, + 0x0060000a, 0x00700000, 0x00106001, 0x00700083, 0x00910880, 0x00901ffe, + 0x00940400, 0x00200020, 0x0060000b, 0x00500069, 0x0060000c, 0x00401b68, + 0x0040aa06, 0x0040ab05, 0x00600009, 0x00700005, 0x00700006, 0x0060000e, + ~0 +}; + +static uint32_t nv4e_ctx_voodoo[] = { 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409565, 0x00409a06, 0x0040a868, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080, @@ -477,7 +637,8 @@ nv40_graph_init(drm_device_t *dev) DRM_DEBUG("chipset (from PMC_BOOT_0): NV%02X\n", chipset); switch (chipset) { case 0x40: ctx_voodoo = nv40_ctx_voodoo; break; - case 0x4e: ctx_voodoo = c51_ctx_voodoo; break; + case 0x43: ctx_voodoo = nv43_ctx_voodoo; break; + case 0x4e: ctx_voodoo = nv4e_ctx_voodoo; break; default: DRM_ERROR("Unknown ctx_voodoo for chipset 0x%02x\n", chipset); ctx_voodoo = NULL; |
From: <dar...@ke...> - 2007-01-08 01:50:56
|
shared-core/nv40_graph.c | 3 +-- 1 files changed, 1 insertion(+), 2 deletions(-) New commits: diff-tree 26bf6d9b5b5be19973f6da4f5ed292c7f83de099 (from 128d87a3dd26b1c633dac3fe0f0d5e9190f11d53) Author: Ben Skeggs <dar...@ii...> Date: Mon Jan 8 12:50:44 2007 +1100 nouveau: oops diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c index 45c451f..f5469f8 100644 --- a/shared-core/nv40_graph.c +++ b/shared-core/nv40_graph.c @@ -388,8 +388,7 @@ nv40_graph_context_create(drm_device_t * unsigned int ctx_size; int i, chipset; - chipset = (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000) >> 24; - + chipset = (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000) >> 20; switch (chipset) { case 0x40: ctx_size = NV40_GRCTX_SIZE; |
From: <ai...@ke...> - 2007-01-08 02:10:43
|
linux-core/i830_dma.c | 6 +++--- 1 files changed, 3 insertions(+), 3 deletions(-) New commits: diff-tree 5bf60c9d6c2e04a65085a0a332de24b06043fcb8 (from 26bf6d9b5b5be19973f6da4f5ed292c7f83de099) Author: Dave Airlie <ai...@li...> Date: Mon Jan 8 13:09:12 2007 +1100 i830: complete fix for i830 maps diff --git a/linux-core/i830_dma.c b/linux-core/i830_dma.c index e35551b..e93307f 100644 --- a/linux-core/i830_dma.c +++ b/linux-core/i830_dma.c @@ -323,7 +323,7 @@ static int i830_freelist_init(drm_device buf_priv->map.offset = buf->bus_address; buf_priv->map.size = buf->total; - buf_priv->map.type = 0; + buf_priv->map.type = _DRM_AGP; buf_priv->map.flags = 0; buf_priv->map.mtrr = 0; @@ -380,9 +380,9 @@ static int i830_dma_initialize(drm_devic dev_priv->ring.End = init->ring_end; dev_priv->ring.Size = init->ring_size; - dev_priv->ring.map.offset = init->ring_start; + dev_priv->ring.map.offset = dev->agp->base + init->ring_start; dev_priv->ring.map.size = init->ring_size; - dev_priv->ring.map.type = 0; + dev_priv->ring.map.type = _DRM_AGP; dev_priv->ring.map.flags = 0; dev_priv->ring.map.mtrr = 0; |
From: <ma...@ke...> - 2007-01-08 04:00:09
|
shared-core/nv40_graph.c | 155 +++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 155 insertions(+) New commits: diff-tree d0080d71b9f3df0d4f743324b7e8f1ce580bdcaf (from 6eaa1272b4159a547d6da21f14cbcc5b5d0f600c) Author: Stephane Marchesin <mar...@ic...> Date: Mon Jan 8 05:02:40 2007 +0100 nouveau: nv4a context support. diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c index f5469f8..53f55bc 100644 --- a/shared-core/nv40_graph.c +++ b/shared-core/nv40_graph.c @@ -10,6 +10,7 @@ */ #define NV40_GRCTX_SIZE (175*1024) #define NV43_GRCTX_SIZE (70*1024) +#define NV4A_GRCTX_SIZE (60*1024) #define NV4E_GRCTX_SIZE (25*1024) /*TODO: deciper what each offset in the context represents. The below @@ -272,6 +273,122 @@ nv43_graph_context_init(drm_device_t *de INSTANCE_WR(ctx, i/4, 0x3f800000); }; +static void nv4a_graph_context_init(drm_device_t *dev, struct mem_block *ctx) +{ + drm_nouveau_private_t *dev_priv = dev->dev_private; + int i; + + INSTANCE_WR(ctx, 0x00000/4, nouveau_chip_instance_get(dev, ctx)); + INSTANCE_WR(ctx, 0x00024/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x00028/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x00030/4, 0x00000001); + INSTANCE_WR(ctx, 0x0011c/4, 0x20010001); + INSTANCE_WR(ctx, 0x00120/4, 0x0f73ef00); + INSTANCE_WR(ctx, 0x00128/4, 0x02008821); + INSTANCE_WR(ctx, 0x00158/4, 0x00000001); + INSTANCE_WR(ctx, 0x0015c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00160/4, 0x00000001); + INSTANCE_WR(ctx, 0x00164/4, 0x00000001); + INSTANCE_WR(ctx, 0x00168/4, 0x00000001); + INSTANCE_WR(ctx, 0x0016c/4, 0x00000001); + INSTANCE_WR(ctx, 0x00170/4, 0x00000001); + INSTANCE_WR(ctx, 0x00174/4, 0x00000001); + INSTANCE_WR(ctx, 0x00178/4, 0x00000040); + INSTANCE_WR(ctx, 0x0017c/4, 0x00000040); + INSTANCE_WR(ctx, 0x00180/4, 0x00000040); + INSTANCE_WR(ctx, 0x00188/4, 0x00000040); + INSTANCE_WR(ctx, 0x001d0/4, 0x0b0b0b0c); + INSTANCE_WR(ctx, 0x00340/4, 0x00040000); + INSTANCE_WR(ctx, 0x00350/4, 0x55555555); + INSTANCE_WR(ctx, 0x00354/4, 0x55555555); + INSTANCE_WR(ctx, 0x00358/4, 0x55555555); + INSTANCE_WR(ctx, 0x0035c/4, 0x55555555); + INSTANCE_WR(ctx, 0x00388/4, 0x00000008); + INSTANCE_WR(ctx, 0x0039c/4, 0x00003010); + INSTANCE_WR(ctx, 0x003cc/4, 0x00000111); + INSTANCE_WR(ctx, 0x003d0/4, 0x00080060); + INSTANCE_WR(ctx, 0x003ec/4, 0x00000080); + INSTANCE_WR(ctx, 0x003f0/4, 0xffff0000); + INSTANCE_WR(ctx, 0x003f4/4, 0x00000001); + INSTANCE_WR(ctx, 0x00408/4, 0x46400000); + INSTANCE_WR(ctx, 0x00418/4, 0xffff0000); + INSTANCE_WR(ctx, 0x00424/4, 0x0fff0000); + INSTANCE_WR(ctx, 0x00428/4, 0x0fff0000); + INSTANCE_WR(ctx, 0x00430/4, 0x00011100); + for (i=0x0044c; i<=0x00488; i+=4) + INSTANCE_WR(ctx, i/4, 0x07ff0000); + INSTANCE_WR(ctx, 0x00494/4, 0x4b7fffff); + INSTANCE_WR(ctx, 0x004bc/4, 0x30201000); + INSTANCE_WR(ctx, 0x004c0/4, 0x70605040); + INSTANCE_WR(ctx, 0x004c4/4, 0xb8a89888); + INSTANCE_WR(ctx, 0x004c8/4, 0xf8e8d8c8); + INSTANCE_WR(ctx, 0x004dc/4, 0x40100000); + INSTANCE_WR(ctx, 0x004f8/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x0052c/4, 0x435185d6); + INSTANCE_WR(ctx, 0x00530/4, 0x2155b699); + INSTANCE_WR(ctx, 0x00534/4, 0xfedcba98); + INSTANCE_WR(ctx, 0x00538/4, 0x00000098); + INSTANCE_WR(ctx, 0x00548/4, 0xffffffff); + INSTANCE_WR(ctx, 0x0054c/4, 0x00ff7000); + INSTANCE_WR(ctx, 0x00550/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x0055c/4, 0x00ff0000); + INSTANCE_WR(ctx, 0x00594/4, 0x00ffff00); + for (i=0x005d8; i<=0x00614; i+=4) + INSTANCE_WR(ctx, i/4, 0x00018488); + for (i=0x00618; i<=0x00654; i+=4) + INSTANCE_WR(ctx, i/4, 0x00028202); + for (i=0x00698; i<=0x006d4; i+=4) + INSTANCE_WR(ctx, i/4, 0x0000aae4); + for (i=0x006d8; i<=0x00714; i+=4) + INSTANCE_WR(ctx, i/4, 0x01012000); + for (i=0x00718; i<=0x00754; i+=4) + INSTANCE_WR(ctx, i/4, 0x00080008); + for (i=0x00798; i<=0x007d4; i+=4) + INSTANCE_WR(ctx, i/4, 0x00100008); + for (i=0x00828; i<=0x00834; i+=4) + INSTANCE_WR(ctx, i/4, 0x0001bc80); + for (i=0x00838; i<=0x00844; i+=4) + INSTANCE_WR(ctx, i/4, 0x00000202); + for (i=0x00858; i<=0x00864; i+=4) + INSTANCE_WR(ctx, i/4, 0x00000008); + for (i=0x00878; i<=0x00884; i+=4) + INSTANCE_WR(ctx, i/4, 0x00080008); + INSTANCE_WR(ctx, 0x00898/4, 0x00000002); + INSTANCE_WR(ctx, 0x008cc/4, 0x00000021); + INSTANCE_WR(ctx, 0x008d0/4, 0x030c30c3); + INSTANCE_WR(ctx, 0x008d4/4, 0x00011001); + INSTANCE_WR(ctx, 0x008e0/4, 0x3e020200); + INSTANCE_WR(ctx, 0x008e4/4, 0x00ffffff); + INSTANCE_WR(ctx, 0x008e8/4, 0x0c103f00); + INSTANCE_WR(ctx, 0x008f4/4, 0x00040000); + INSTANCE_WR(ctx, 0x0092c/4, 0x00008100); + INSTANCE_WR(ctx, 0x009b8/4, 0x00000001); + INSTANCE_WR(ctx, 0x009fc/4, 0x00001001); + INSTANCE_WR(ctx, 0x00a04/4, 0x00000003); + INSTANCE_WR(ctx, 0x00a08/4, 0x00888001); + INSTANCE_WR(ctx, 0x00a8c/4, 0x00000005); + INSTANCE_WR(ctx, 0x00a98/4, 0x0000ffff); + INSTANCE_WR(ctx, 0x00ab4/4, 0x00005555); + INSTANCE_WR(ctx, 0x00ab8/4, 0x00005555); + INSTANCE_WR(ctx, 0x00abc/4, 0x00005555); + INSTANCE_WR(ctx, 0x00ac0/4, 0x00000001); + INSTANCE_WR(ctx, 0x00af8/4, 0x00000001); + for (i=0x016c0; i<=0x01738; i+=8) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x03840; i<=0x05670; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x05680; i<=0x05a70; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x07e00; i<=0x09ff0; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x0a000; i<=0x0a3f0; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); + for (i=0x0c780; i<=0x0e970; i+=24) + INSTANCE_WR(ctx, i/4, 0x00000001); + for (i=0x0e980; i<=0x0ed70; i+=16) + INSTANCE_WR(ctx, i/4, 0x3f800000); +} + static void nv4e_graph_context_init(drm_device_t *dev, struct mem_block *ctx) { drm_nouveau_private_t *dev_priv = dev->dev_private; @@ -398,6 +515,10 @@ nv40_graph_context_create(drm_device_t * ctx_size = NV43_GRCTX_SIZE; ctx_init = nv43_graph_context_init; break; + case 0x4a: + ctx_size = NV4A_GRCTX_SIZE; + ctx_init = nv4a_graph_context_init; + break; case 0x4e: ctx_size = NV4E_GRCTX_SIZE; ctx_init = nv4e_graph_context_init; @@ -589,6 +710,39 @@ static uint32_t nv43_ctx_voodoo[] = { ~0 }; +static uint32_t nv4a_ctx_voodoo[] = { + 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, + 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409965, 0x00409e06, + 0x0040ac68, 0x00200000, 0x0060000a, 0x00700000, 0x00106000, 0x00700080, + 0x004014e6, 0x007000a0, 0x00401a84, 0x00700082, 0x00600001, 0x00500061, + 0x00600002, 0x00401b68, 0x00500060, 0x00200001, 0x0060000a, 0x0011814d, + 0x00110158, 0x00105401, 0x0020003a, 0x00100051, 0x001040c5, 0x0010c1c4, + 0x001041c9, 0x0010c1dc, 0x00150210, 0x0012c225, 0x00108238, 0x0010823e, + 0x001242c0, 0x00200040, 0x00100280, 0x00128100, 0x00128120, 0x00128143, + 0x0011415f, 0x0010815c, 0x0010c140, 0x00104029, 0x00110400, 0x00104d10, + 0x001046ec, 0x00500060, 0x00403a87, 0x0060000d, 0x00407de6, 0x002000f1, + 0x0060000a, 0x00148653, 0x00104668, 0x0010c66d, 0x00120682, 0x0011068b, + 0x00168691, 0x001046ae, 0x001046b0, 0x001206b4, 0x001046c4, 0x001146c6, + 0x001646cc, 0x001186e6, 0x001046ed, 0x001246f0, 0x002000c0, 0x00100700, + 0x0010c3d7, 0x001043e1, 0x00500060, 0x00405800, 0x00405884, 0x00600003, + 0x00500067, 0x00600008, 0x00500060, 0x00700082, 0x00200232, 0x0060000a, + 0x00104800, 0x00108901, 0x00104910, 0x00124920, 0x0020001f, 0x00100940, + 0x00140965, 0x00148a00, 0x00108a14, 0x00160b00, 0x00134b2c, 0x0010cd00, + 0x0010cd04, 0x0010cd08, 0x00104d80, 0x00104e00, 0x0012d600, 0x00105c00, + 0x00104f06, 0x002002c8, 0x0060000a, 0x00300000, 0x00200080, 0x00407300, + 0x00200084, 0x00800001, 0x00200510, 0x0060000a, 0x002037e0, 0x0040798a, + 0x00201320, 0x00800029, 0x00407d84, 0x00201560, 0x00800002, 0x00409100, + 0x00600006, 0x00700003, 0x00408ae6, 0x00700080, 0x0020007a, 0x0060000a, + 0x00104280, 0x002002c8, 0x0060000a, 0x00200004, 0x00800001, 0x00700000, + 0x00200000, 0x0060000a, 0x00106002, 0x0040ac84, 0x00700002, 0x00600004, + 0x0040ac68, 0x00700000, 0x00200000, 0x0060000a, 0x00106002, 0x00700080, + 0x00400a84, 0x00700002, 0x00400a68, 0x00500060, 0x00600007, 0x00409d88, + 0x0060000f, 0x00000000, 0x00500060, 0x00200000, 0x0060000a, 0x00700000, + 0x00106001, 0x00700083, 0x00910880, 0x00901ffe, 0x01940000, 0x00200020, + 0x0060000b, 0x00500069, 0x0060000c, 0x00401b68, 0x0040ae06, 0x0040af05, + 0x00600009, 0x00700005, 0x00700006, 0x0060000e, ~0 +}; + static uint32_t nv4e_ctx_voodoo[] = { 0x00400889, 0x00200000, 0x0060000a, 0x00200000, 0x00300000, 0x00800001, 0x00700009, 0x0060000e, 0x00400d64, 0x00400d05, 0x00409565, 0x00409a06, @@ -637,6 +791,7 @@ nv40_graph_init(drm_device_t *dev) switch (chipset) { case 0x40: ctx_voodoo = nv40_ctx_voodoo; break; case 0x43: ctx_voodoo = nv43_ctx_voodoo; break; + case 0x4a: ctx_voodoo = nv4a_ctx_voodoo; break; case 0x4e: ctx_voodoo = nv4e_ctx_voodoo; break; default: DRM_ERROR("Unknown ctx_voodoo for chipset 0x%02x\n", chipset); |
From: <ai...@ke...> - 2007-01-08 11:27:39
|
linux-core/drm_sman.c | 1 + 1 files changed, 1 insertion(+) New commits: diff-tree 22821cf01d6509b7c074e42ae0ef9567e48e97d2 (from d0080d71b9f3df0d4f743324b7e8f1ce580bdcaf) Author: Dave Airlie <ai...@li...> Date: Mon Jan 8 22:26:35 2007 +1100 add export symbol for memory manager diff --git a/linux-core/drm_sman.c b/linux-core/drm_sman.c index 19a13f3..e15db6d 100644 --- a/linux-core/drm_sman.c +++ b/linux-core/drm_sman.c @@ -161,6 +161,7 @@ drm_sman_set_manager(drm_sman_t * sman, return 0; } +EXPORT_SYMBOL(drm_sman_set_manager); static drm_owner_item_t *drm_sman_get_owner_item(drm_sman_t * sman, unsigned long owner) |
From: <ma...@ke...> - 2007-01-08 19:53:28
|
shared-core/nv40_graph.c | 2 +- 1 files changed, 1 insertion(+), 1 deletion(-) New commits: diff-tree deba42ef32da0c2d0977cdeb639420e1ac1b7f2b (from 22821cf01d6509b7c074e42ae0ef9567e48e97d2) Author: Stephane Marchesin <mar...@ic...> Date: Mon Jan 8 20:55:57 2007 +0100 nouveau: fix nv4a context size. diff --git a/shared-core/nv40_graph.c b/shared-core/nv40_graph.c index 53f55bc..3e1b2f6 100644 --- a/shared-core/nv40_graph.c +++ b/shared-core/nv40_graph.c @@ -10,7 +10,7 @@ */ #define NV40_GRCTX_SIZE (175*1024) #define NV43_GRCTX_SIZE (70*1024) -#define NV4A_GRCTX_SIZE (60*1024) +#define NV4A_GRCTX_SIZE (64*1024) #define NV4E_GRCTX_SIZE (25*1024) /*TODO: deciper what each offset in the context represents. The below |
From: <ai...@ke...> - 2007-01-09 04:36:37
|
shared-core/nouveau_state.c | 8 ++++++-- 1 files changed, 6 insertions(+), 2 deletions(-) New commits: diff-tree a70aedd5fc78a162aeb681d47a75edcc831ed3f3 (from deba42ef32da0c2d0977cdeb639420e1ac1b7f2b) Author: Dave Airlie <ai...@li...> Date: Tue Jan 9 13:38:36 2007 +1100 novueau: try resource 3 if resource 2 is 0 length This happens on my NV43 PPC diff --git a/shared-core/nouveau_state.c b/shared-core/nouveau_state.c index 44f8c1a..1e0587f 100644 --- a/shared-core/nouveau_state.c +++ b/shared-core/nouveau_state.c @@ -66,8 +66,12 @@ int nouveau_firstopen(struct drm_device /* map larger RAMIN aperture on NV40 cards */ if (dev_priv->card_type >= NV_40) { - ret = drm_addmap(dev, drm_get_resource_start(dev, 2), - drm_get_resource_len(dev, 2), + int ramin_resource = 2; + if (drm_get_resource_len(dev, ramin_resource) == 0) + ramin_resource = 3; + + ret = drm_addmap(dev, drm_get_resource_start(dev, ramin_resource), + drm_get_resource_len(dev, ramin_resource), _DRM_REGISTERS, _DRM_READ_ONLY, &dev_priv->ramin); |