#122 VGABios

[Anonymous]

Hello I'am a french user of bochs and I have a very big
probleme.

I make a vga mode13h driver for my OS, and my code work
with my bios but not with bochs.

Is it a limitation of vgabios-elpin ??

I use bochs 1.2.1 with this code:

/ VGA index register ports /

define VGA_LOW 0x3C0

define CRT_I 0x3D4 /* CRT Controller Index (mono:

0x3B4) */

define ATT_IW 0x3C0 /* Attribute Controller Index &

Data Write Register */

define GRA_I 0x3CE / Graphics Controller Index /

define SEQ_I 0x3C4 / Sequencer Index /

define PEL_IW 0x3C8 / PEL Write Index /

/ VGA data register ports /

define CRT_D 0x3D5 /* CRT Controller Data Register

(mono: 0x3B5) */

define ATT_R 0x3C1 /* Attribute Controller Data

Read Register */

define GRA_D 0x3CF /* Graphics Controller Data

Register */

define SEQ_D 0x3C5 / Sequencer Data Register /

define MIS_R 0x3CC / Misc Output Read Register /

define MIS_W 0x3C2 / Misc Output Write Register /

define IS1_R 0x3DA /* Input Status Register 1

(mono: 0x3BA) */

define PEL_D 0x3C9 / PEL Data Register /

define VGA_HIGH 0x3DF

/ VGA indexes max counts /

define CRT_C 0x19 / 24 CRT Controller Registers /

define ATT_C 0x15 /* 21 Attribute Controller

Registers */

define GRA_C 0x09 /* 9 Graphics Controller

Registers */

define SEQ_C 0x05 / 5 Sequencer Registers /

define MIS_C 0x01 / 1 Misc Output Register /

/ VGA registers saving indexes /

define CRT 0 /* CRT Controller

Registers start */

define ATT CRT+CRT_C /* Attribute Controller

Registers start */

define GRA ATT+ATT_C /* Graphics Controller

Registers start */

define SEQ GRA+GRA_C / Sequencer Registers /

define MIS SEQ+SEQ_C / General Registers /

define END MIS+MIS_C / last /

//Index pour les ports

define SEQ_CLOCK_MODE 0x01

//VGA PALETTE REGISTER

define PALETTE_MASK 0x3C6 // bit mask

register

define PALETTE_REG_READ 0x3C7 // read index

define PALETTE_REG_WRITE 0x3C8 // write index

define PALETTE_DATA 0x3C9 //

send/receive data here

typedef struct __vga_reg {
u8 crt[CRT_C];
u8 att[ATT_C];
u8 gra[GRA_C];
u8 seq[SEQ_C];
u8 misc;
u8 vss;
}vgaRegister;

static vgaRegister vgaMode13Reg = {
{ 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x9c, 0x0e, 0x8f, 0x28, 0x40, 0x96, 0xb9,
0xa3,0xff }, //CRT
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
0x41, 0, 0x0f, 0, 0 },
//ATT (ou ATC)
{ 0, 0, 0, 0, 0, 0x40, 0x05, 0x0f, 0xff },
//GRA (ou GFX)
{ 0x03, 0x01, 0x0f, 0x00, 0x0e },
//SEQ
0,
0
};

void clock_chip(u32 pixclock)
{
static struct {
u32 pixclock;
u8 misc;
u8 seq_clock_mode;
} ptr, best, vgaclocks[] = {
{ 79442 / 12.587 /, 0x00, 0x08},
{ 70616 / 14.161 /, 0x04, 0x08},
{ 39721 / 25.175 /, 0x00, 0x00},
{ 35308 / 28.322 /, 0x04, 0x00},
{ 0 / bad /, 0x00, 0x00}};
int err;

best = vgaclocks;
err = pixclock - best->pixclock;
if (err < 0) 
  err = -err;
for (ptr = vgaclocks + 1; ptr->pixclock; ptr++) {
    int tmp;

    tmp = pixclock - ptr->pixclock;
    if (tmp < 0) tmp = -tmp;
    if (tmp < err) {
        err = tmp;
        best = ptr;
    }
}

  vgaMode13Reg.misc |= best->misc;
  vgaMode13Reg.seq[SEQ_CLOCK_MODE] |= best->seq_clock_mode;

}

void initVga() {
int i;

vgaRegister* reg;

reg=&vgaMode13Reg;

cli();

reg->misc = 0xC3; // enable CPU, ports 0x3Dx, positive sync
clock_chip(39721); //cette valeur vient de linux je
ne sais pas a quoi elle sert

outb(MIS_W,inb(MIS_R) | 0x01);

//screen off
inb(IS1_R);
outb(ATT_IW,0x00);

//outbp( MIS_W,0x63);
//outbp( IS1_R,0x00);

// update misc output register
//outb( MIS_W,vgaMode13Reg.misc);

for (i=0; i < SEQ_C; i++) {
outbp(SEQ_I,i );
outbp(SEQ_I+1,reg->seq[i]);
}

outbp(CRT_I,0x0e);
outbp(CRT_D,0x11);

for (i=0; i < CRT_C; i++) {
outbp(CRT_I,i);
outbp(CRT_I+1,reg->crt[i]);
}

for (i=0; i < GRA_C; i++) {
outbp(GRA_I,i);
outbp(GRA_I + 1,reg->gra[i] );
}

inbp(0x3da);

for (i=0; i < ATT_C; i++) {
inb( ATT_IW); //TODO ligne normalement inutile
outbp(ATT_IW,i);
outbp(ATT_IW,reg->att[i]);
}

outbp(ATT_IW,0x20);

//k_sleep(50);

outb(SEQ_I,0x01);
outb(SEQ_D,reg->seq[1]);

//screen on
inb(IS1_R);
outb(ATT_IW,0x20);

sti();
}

I use the vga16 framebuffer of linux and other tip.

If I don't make some initialization please send me the
code. I hate reboot my computer

good bye
Guillaume DORCHIES (Nice - France)

PS: I love your work :-))

[Bryce Denney]

Logged In: YES
user_id=185114

Can you provide a bootable floppy disk image that runs this
code? You can put it on a web/ftp site or email it to
bochs-testing@tlw.com. That will make it much easier for
others to reproduce the problem.

Bochs gets its VGA BIOS in binary form from Elpin, so we
don't have source code of the VGA BIOS itself.

[Greg Alexander]

Logged In: YES
user_id=125806

What does bochs do with your code? We don't support all of
the VGA modes (read CGA, EGA), so we need to know if bochs
panics or it just doesn't seem to work correctly somehow.

[Bryce Denney]

Logged In: YES
user_id=185114

Please be more specific in your description of the problem.
Without more details of what bochs is doing wrong, we cannot
fix it. Thanks.