Currently ICE3 is not supported by AVaRICE. Because of serious bugs in the AS6 and the less price of ICE3 it makes sense to have ICE3 as interface for debugging. A session of AS6 debugging and the description of steps to be executed show a full cycle of loading the solution in AS6, compiling, uploading and stepping through a program. At the end of the trace the synchronization between ICE3 and AS6 (by a bug in ???) is lost and a target power off / on cycle finishes the trace. If any additional traces are required I'll provide them on request.
The trace is made with Wireshark 1.8.3 with all empty USB packets (Data_len == 0) removed. The full trace is still available.
Tracefile created with wireshark & description
FWIW, I just committed an XSL stylesheet under tools/pdml.xsl to SVN.
This can be used to extract the relevant (for us) USB conversation from
the Wireshark trace data. Export them in Wireshark in PDML format,
and then run that stylesheet across it using your favorite XSLT processor.
Knut, in order to make some educated guess about the not so obvious
data in the trace, could you please post all additional data you could find
in Atmel Studio? Things coming to mind are:
. JTAGICE3 hardware and firmware revisions that are displayed
. target voltage
. programming and debugging clock frequencies
Knut, any chance that you might upload further traces to cross-check individual
data fields?
I'm interested in collecting data from as many targets as possible:
. devices with different memory configurations
. debugging with different options (like "timers running")
. debugging with only few vs. many breakpoints (to see how software BPs are communicated)
Programming an ATmega1281 at 2.6 V, and an ATmega128 at 2.4 V
Programming an ATmega2560 at 3.0 V, and ATmega16 at 5.0 V with external reset and 0.5 MHz clock, and a JTAG chain of ATmega2560 and ATmega1281
I've also done some tests with Atmel Studio 6, tracing the USB data with
SnoopyPro. The *.txt files below represent the relevant data (converted
into simple text format). Tests cover:
. ATmega1281 at 2.7 V
. ATmega128 at 2.4 V
. ATmega2560 at 3.0 V
. ATmeg16 at 5.0 V, with external reset, 0.5 MHz JTAG clock
. JTAG chain of ATmega2560 and ATmega1281
Upload to an ATxmega16D4 through PDI.
Production signature row as read back from that ATxmega16D4
Xmega256a3 (part of daisy chain), upload + erase: chip, application, boot, EEPROM, usersig
ATmega32U2 via ISP
Trace data sent via mailinglist:
https://sourceforge.net/mailarchive/forum.php?thread_name=50E0AF30.3060001%40web.de&forum_name=avarice-user
It's done now.