system_stm32: Reset cause register must be reset!
arch.nut: Add STM32G473
stm32g4: RAM2 is better declared as CCM. Fix Typo.
stm32l4: Enable Low Power Mode when running below 2 MHz
stm32l4/flash: Change test for unaligned write.
Conf: Provide boardname as a define
stm32_spi_c: Handle transfer on devices with FIFO
stm32_spi_cb: Fix wrong SPI rate indication
stm32_spi_cb: Fix for USARTV2 8/9 bit devices only
stm32_spi_cb: Partial fixes for F1, but disabled for F1 for now.
Stm32: Add USART_SPI to stm32_spi_cb.
STM32xCD: Special chip configuration with restricted memory
dev.nut: Fix typo I2C vs OWI
stm32: Compile stm32_lcd16seg only for boards with LCD.
owibus: Repeat diagnostic output when no OWIBUS is configured.
spibus: Fix comment for NutSpiBusSetBits
nucleo_l152re: On the default board there is no 32 kHz crystal.
system_stm32.c: Changes to MemRemap and SysCfg enable needed for F1/F7.
system_stm32: Ugly hack to work around gcc issue 105523
Hello, "Nagore" == Nagore Pinillos napiza@users.sourceforge.net writes: Nagore> Thanks a lot for your suggestions Uwe. Have read about Nagore> this software and gonna give it an opportunity. But after Nagore> installing everything, I am afraid that it does not Nagore> support xc3s700, do you know smt about this? Thanks in Nagore> advance For SRAM programming, try to simply add the JTAG IDs from xc3sprog to openFpgaloader src/part.hpp. For flash programming, add your part in spiOverJtag/build.py and...
Hello, please have a look at openFpgaLoader github.com:trabucayre/openFPGALoader.git It seem to implement MCS parsing and is mantained. I also use openFPGALoader instead of xc3sprog now. Cheers "Nagore" == Nagore Pinillos napiza@users.sourceforge.net writes: Nagore> --- Nagore> **[support-requests:#16] MCS file programming error with Nagore> xc3sprog** Nagore> **Status:** open **Group:** v1.0_(example) **Created:** Nagore> Thu Jul 18, 2024 03:35 PM UTC by Nagore Pinillos **Last Nagore> Updated:**...
stm32: Provide bootloader infrastructure
stm32l4_flash: Better check for unaligned write
cortexm/linker: Use > RAM AT > FLASH syntax for correct print-memory-usage
stm32_usart: Allow to provide RTS by GPIO if IP has no intrinsic RTS
STM32: Add STM32F410
stm32_clk: Missing bracket cause bad RCC_BDCR setting
stm32: Add DMA interface with generated lists.
stm32: Add NUCLEO-G0B1RE board.
stm32spi.nut: Fix typo
stm32: Generate DMA properities from the vendor files
stm32_dma.h: Clean up unused items
stm32: Provide LSI Value in common header.
nucleo_l432kc.conf: Define SPI1 Pins on Arduino D11/12
stm32f2_dma.h: Fix DMA_M2M define
stm32_spi_cb: Allow to build w/o DMA(temporary)
stm32/stm32dev: Fix wrong macro name for TIM1_CC
stm32_dmairq: Fill structure only to its extend
stm32_make_dma: Extend handling of DMA_MUX devices.
stm32h745: Start. Not yet usable.
stm32/boards: Some fixes to SPI pin assignment w.r.t Arduino connector.
stm32_spi_cb: Better check for the range of bits in a transfer.
stm32_gpio_v2: No error for Stm32GpioConfigSet for PIN_NONE
stm32l1_flash: Try to fix the WRPR setup.
nutinit.c: With LAZY_DEBUG, use ARM macro to load MSP
STM32/FLASH_SIZE: Provide DIE_FLASH_SIZE as fallback for FLASH_SIZE in the headers
STM32: Regenerate PINMUX and add STM32H7 files
ih_stm32: Tim1 can have different companions
stm32f3: CCMRAM size is not available in the ST provided headers/db files.
stm32: Provide generated sizes for the different ram areas
Allow a custom heap setup.
confos: Require DEV_NVMEM provided for real NutLoadConfig()
Allow to compile with STDIO_FLOATING_POINT on recent arm-eabi-none-gcc
Update core_cm0plus.h and /cmsis_gcc.h
cortex_init: Rework Cortex_TestBootSwitch so System bootloader can also be used
nucleo_l432kc has I2C1 on PA6/7.
stm32_pwm: FixStm32PwmGetClock
stm32/usart: Delay startbit after driver enable.
stm32_usart: UARTx_DE_INV is always defined. Check values.
stm32f1_dma: Initialize DMA unit only if not yet initialized.
stm32_timer: Keep TIM_TS clean when no trigger selected
f723_discovery.conf: Uart6 TX/RX pin assignment was swapped
lua/ldump.c: Remove expression conflicting with newer GCCs as upstream did.
stm32fam.nut: Provide HW_GPIO for STM32F1
stm32f103xg: Fix configuration.
gpio_stm32: Correct size of bitband area is 1Meg against 64k before.
stm32f723: Fix for ETH_IRQn defined in the vendor header but no IP.
Makerules.gcc: Print memory usage
stm32_reset.c: Fix typo affecting H7.
stm32: Provide autogenerated indicator if U(S)ART device can do autobaud.
stm32_get_devices: Correct the DIE/Chip ID detection
stm32_gpio.h: Make stm32_port_nr2gpio[] external
nut/tls: Move some variable definition to where it is used.
#define STLINK_JTAG_UNKNOWN_JTAG_CHAIN 0x04 The Stlink denies to connect to non-STM jtag devices.
Detect-half-duplex-lines-and-ignore-echo
Add-STM32G4-devices
I can not explicit tell. Reports from windows users dropped in about the problems, but they did not tell what version exact. So let's assume it is the same issue. Is that issue already fixed? Then I can point people to the fixed version.
Possible windows problems
Paul Fertser writes: On Mon, Jul 27, 2020 at 11:21:00AM +0200, bon@elektron.ikp.physik.tu-darmstadt.de wrote: Rejecting non-ST MCU probably has also a deeper impact. The need to read the MCUID! This has often problems when in sleep or even when in reset. Even with stprog, STLINKV3 often does to to a board the STLINK-V2(1) had no probblem. I'm surprised I get no constructive feedback on this ticket. Now that it's trivial to try a firmware with patched-out IDCODE check why isn't anybody trying that?...
Paul Fertser via OpenOCD-devel writes: [tickets:#275] ST-Link v3 refuses to work with non-ST targets, RE help needed Status: new Milestone: 0.9.0 Created: Fri Jul 24, 2020 04:26 PM UTC by Paul Fertser Last Updated: Fri Jul 24, 2020 04:26 PM UTC Owner: Paul Fertser For the reasons yet to be discovered, ST-Link v3 is not connecting to the Cortex-M targets not produced by ST. There's likely a way to fix this by patching the firmware, and thanks to the amazing effort by some community members patching...
Start address not taken from HEX file
Newer Devices need more padding
stm32f2_4_flash: STM32F2 has no second bank.
stm32_timer: Fix typo introduced with 6906.
reset: Small fix allowing AT91 compilation.
nutcomponent: when resolving the real path, use only slash as path delimiter.
stm32: Export HRTIM1 signals.
stm32_timer: Handle usage of both CHx and CHxN channel.
tools/binaries/x86_64-w64-mingw32: Add crossbuild tools (Experimantal)
stm32_usart: Do no set Autobaud when not requested.
Allow to set Overdrive for Stm32G4 to reach 170 MHz.
stm32dev.nut: Clean up some typos and provide uartX with usartX provided.
stm32f1_rtc: Handle RTC Wakeup from stop mode.
caltime: Rectify comment about Use_Time_Zone.
stm32f1_rtc: Handle RTC time as UTC.
stm32f1/rtc: Do not reset the rtc counter values..
stm32f1_3_flash: Fix Stm32FlashFindConfSector().
stm32 f1/f3 flash: Handle all CONF_SIZE in one clause.
stm32: Rework F2/4/7 flash.
stm32_can: Add BTR values for STM32L4 running at 80 MHz.