Thomas

Oh, right. Sorry about that. I have attached the Gerber files I exported. The comment says NPTH. That was with 1.78. Yes, the holes in my PCBs are plated. And I realized that AISLER's viewer also marks them as plated. I just never bothered to check. (I guess they are serious about their what-you-see-is-what-you-get guarantee.) I made my AISLER project public: https://aisler.net/p/LIHTSEKK If you're interested, follow the link, go to the PCB tab, and click on Highlight Drills. It'll show the holes...

And here they are! I just got a package with my PCBs from Aisler. Woohoo! They turned out great! See the attached JPEG file. I only submitted the bottom layer, but the holes are still PTH. No harm in that, just better than I needed. (I attached the corresponding .vrt file, in case this is unexpected, i.e., a potential bug or a mistake I made.) Out of curiosity, how does one express NPTH vs. PTH in Gerber files? In any case, thank you so much, Alex, for VeroRoute and for your commitment. I think that...

Great! Thank you for 1.77, Alex. I just submitted my first PCB order to Aisler. Let's see how it turns out. I should get them next week and I'll report back.

Oh, right, yes, I can just make the pads smaller myself. For some reason I thought that this size was hard-coded for now for the Gerber export. But it's not. Sorry about that. Alright, I'll hold off on trying to get a PCB made and wait for the next release. Oh, and by the way, it turns out that I did not have to rename any of the files when submitting to Aisler. Right now, VeroRoute seems to be following some other tool's naming convention, which is also supported by Aisler. (In addition to their...

Oh, and it seems that Aisler considers a PCB with bottom-layer copper and top-layer silkscreen as single-layer. Looks like the number of layers only counts copper. And just in case you'd like to check compliance of VeroRoute's Gerber export to Aisler's requirements (minimum trace spacing, etc.) as an example of real-life requirements: https://aisler.net/help/design-rules-and-specifications/2-and-4-layer-design-rules Three PCBs of my small design would cost EUR 19.35 including shipping, BTW. I'll...

Oh, wow! This is amazing. I've tried exporting my little circuit and it worked like a charm. I looked at the exported Gerber files in three different online viewers in addition to gerbv on Ubuntu 18.04 and they all rendered them equally nicely. This is where I went: https://gerber.ucamco.com/ https://circuitpeople.com/ https://tracespace.io/view/ The first link is a viewer made by the people who specified the Gerber format. It also does some validation. It output low resolution warnings, which said...

Man, that looks great! Thank you so much for all the effort you're putting into this.

Oh, wow! That's great. Let me know, when you think you're ready for some beta testers.