John Taylor

Pages 3 and 4 are the High/Low latch states for when driven from the half bridge driver. From this it can be seen that the low level output is 0.5V above ground and the high level output is 0.8V below the positive rail. When selecting relays, low coil holding current/voltage would seem to be the goal but only in so far as it does not violate the available drive voltage... For On-to-Off transistions the timing of the capacitor low voltage is not as critical as the timing for the Off-to-On transistion...

Note that the plots above were for the carry flag which doe not use the output of the half bridge driver which accounts for the capacitor circuit being driven to the rails. The next plot will be from the PC0 latch vs BADDR0 signal which does use the driver as in input.

I have scope captures that I'll post later that show that the drivers work much better that the data sheet would suggest: The datasheet for the half bridge drivers only show output voltage at 0.5A and 1 A loads but the capacitors at end of charge are essentially 0A loads. The captures show that the capacitors charge to 12V and discharge to 0V during the clock high period (5V side) and then drive the relays to these levels during the clock low period. The critical number is whether the capacitor is...

For something like Tic-Tac-Toe you only need 9 input states to play against the computer but you need 27 output states to display Nothing, X or O in 9 cells. You could increase the output states from the available 4 bits = 16 states to 6 bits = 64 states by using the MSb output state to latch the upper and lower 3 bits into a 6 bit result (: 0LMN -> 1XYZ = LMNXYZ A3 A2 A1 A0 D1 D0 0 0 0 0 0 0 Clears entire array (Neither X nor O) 0 0 0 1 0 0 Clears X and O in cell 1 0 0 0 1 0 1 Lights X in cell 1...

For something like Tic-Tac-Toe you only need 9 input states to play against the computer but you need 27 output states to display Nothing, X or O in 9 cells. You could increase the output states from the available 4 bits = 16 states to 6 bits = 64 states by using the MSb output state to latch the upper and lower 3 bits into a 6 bit result (: 0LMN -> 1XYZ = LMNXYZ I would like to see two SBCs play against each other, finally learning the lesson of futility and deciding not to launch the missles!

I have scope captures that I'll post later that show that the drivers work much better that the data sheet would suggest: The datasheet for the half bridge drivers only show output voltage at 0.5A and 1 A loads but the capacitors at end of charge are essentially 0A loads. The captures show that the capacitors charge to 12V and discharge to 0V during the clock high period (5V side) and then drive the relays to these levels during the clock low period. The critical number is whether the capacitor is...

You'll note there are the added components over the link provided: The 10K from the sense resistor to the negative input and the 10nF cap from the output to the negative input. The 10K increases the impedance of the feedback path to allow the capacitor to provide AC negative feedback. This is especially useful when driving an inductive load to prevent the output (At the relay) from oscillating.