Testing svn access with a note added to documen...
Fix encoding of 'sf' and 'sfh' instructions.
Make SPU backend not assert on jump tables.
Fix handling of 'load' nodes.
Flag SPU's function call sequence together.
Handle loading from/storing to undef pointers o...
Fix SPU to cope with vector insertelement to an...
Fix lowering of VECTOR_SHUFFLE on SPU. Old algo...
Fix the lowering of VECTOR_SHUFFLE on SPU to ha...
Add the check to the testcase of r106419.
Remove some unused/redundant code.
Switch SPU calling convention (function argumen...
Add preliminary v2i32 support for SPU backend. ...
Add preliminary v2f32 support for SPU. Like wit...
More SPU v2f32 stuff added: insertelement and s...
Make SPU backend handle insertelement and
Have SPU handle halfvec stores aligned by 8 bytes.
Change SPU C calling convention to match that d...
Remove all traces of v2[i,f]32 on SPU.
Fix a bug with insertelement on SPU.
Remove some dead code from SPU BE that remained
Fix SPU BE to use all the available return regi...
Fix lowering of INSERT_VECTOR_ELT in SPU.
Fix CellSPU vector shuffles, again.
Silence compiler warning.
Change SPU register re-interpretations from OR ...
Zap some redundant 'ori $?, $?, 0' from SPU.
Add the missing cases to the type->registerclas...
Improve lowering of sext to i128 on SPU.
Update target feature matrix for CellSPU
Change v64 datalayout in SPU.
Fix memory access lowering on SPU, adding
Improve code layout, mostly indentation.
Testing svn access with a note added to documen...
Add command line option --gcc to bugpoint.
Fix encoding of 'sf' and 'sfh' instructions.
Make SPU backend not assert on jump tables.
Fix handling of 'load' nodes.
Flag SPU's function call sequence together.
Handle loading from/storing to undef pointers o...
Fix SPU to cope with vector insertelement to an...
Fix lowering of VECTOR_SHUFFLE on SPU. Old algo...
Mark the SPU 'lr' instruction to never have sid...
Add the check to the testcase of r106419.
Remove some unused/redundant code.
Switch SPU calling convention (function argumen...
Add preliminary v2i32 support for SPU backend. ...
Add preliminary v2f32 support for SPU. Like wit...
More SPU v2f32 stuff added: insertelement and s...
Make SPU backend handle insertelement and
Have SPU handle halfvec stores aligned by 8 bytes.
Change SPU C calling convention to match that d...
Remove all traces of v2[i,f]32 on SPU.
Fix a bug with insertelement on SPU.
Remove some dead code from SPU BE that remained
Fix SPU BE to use all the available return regi...
Fix lowering of INSERT_VECTOR_ELT in SPU.
Fix CellSPU vector shuffles, again.
Silence compiler warning.
Change SPU register re-interpretations from OR ...
Zap some redundant 'ori $?, $?, 0' from SPU.
Add the missing cases to the type->registerclas...
Improve lowering of sext to i128 on SPU.
Update target feature matrix for CellSPU
Change v64 datalayout in SPU.
Fix memory access lowering on SPU, adding
Improve code layout, mostly indentation.
Fix a bug with extractelement on SPU.
Division by pow-of-2 is not cheap on SPU, do it...
Use i8 as SETCC result type for i1 in SPU.
Allow for 'fcmp ogt' in SPU.
Add missing i128 case.
Allow machine LICM to do its job on SPU.
Enable PostRA scheduling for SPU.
Handle lshr for i128 correctly on SPU also when
Dont' feed ILA two inputs - it takes just one.
Don't feed 19 bit immediates to ILA.
Add a "nop filler" pass to SPU.
Fix a thinko in 123226 that caused test failure...
Don't crash SPU BE with memory accesses with bi...
Split up RotateShift itinerary in SPU.
Allow sign-extending of i8 and i16 to i128 on S...
Add branch hinting for SPU.
Allow load from constant on SPU.
Allow vector shifts (shl,lshr,ashr) on SPU.
Have SPU backend use the external TCE scheduler...
Don't insert branch hint lables that are never ...
Pass signed (not unsigned) 10 bit field to SPU ...
Fix a iterator out of bounds error, that trigge...
Mark 'branch indirect' instruction as an indire...
Update the documentation of CellSPU, in case it...