Activity for Quantum Leaps
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Quantum Leaps posted a comment on discussion Free Support
Hi Eddie, I'm sorry for the late reply to your question. I'm not sure how to make the cmake work for testing. For now, please just use the regular make, as shown in all other standard examples. --MMS
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Hi Christophe, I'm not sure how you search, but the "dedicated web-page for Arduino" is still there at the most logical URL I can think of: https://www.state-machine.com/arduino Please take a look at what's available. The provided free software should still work, although it is no longer the "latest and greatest" version. --MMS
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Please see: - https://www.state-machine.com/qm/ui_model_file.html#ui_model_xsd - https://www.state-machine.com/qm/qm.xsd --MMS
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Please see: https://www.state-machine.com/qm/ui_model_file.html#ui_model_xsd --MMS
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Hi Giulio, Please see the "Transition to History" design pattern for the description of the concept. Please note that this is the original description of the History pattern from the PSiCC2 book. The QM modeling tool, which has been created after that book was published fully supports transtitions to history (both shallow history and deep history.) But to make it more concrete for you, let's apply it specifically to the Modem state machine attached in the previous post. So, suppose that your Modem...
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Hi Giulio, Please see the "Transition to History" design pattern for the description of the concept. But to make it more concrete for you, let's apply it specifically to the Modem state machine attached in the previous post. So, suppose that your Modem is in the middle of AT-command sequence, say in state "wifi_mode". This state has only only one transition OK, which is expected when everything goes fine. But suppose that ERROR event arrives instead. The "wifi_mode" state does not handle the ERROR...
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Please see the "Transition to History" design pattern for the description of the concept. But to make it more concrete for you, let's apply it specifically to the Modem state machine attached in the previous post. So, suppose that your Modem is in the middle of AT-command sequence, say in state "wifi_mode". This state has only only one transition OK, which is expected when everything goes fine. But suppose that ERROR event arrives instead. The "wifi_mode" state does not handle the ERROR event, so...
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Hi dood444, I'm not aware of a ready-to-use example of an active object for a modem driven by AT commands. The beaten path approach is to send AT command and sleep or wait for the OK response. However, the ERROR responses or some other unsolicited responses are harder to manage this way. A hierarchical state machine approach, on the other hand, can deal with all this in an elegant way because a state machine doesn't block and can handle any event sequence. I've attached a state machine sketch that...
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Hi dood444, I'm not aware of a ready-to-use example of an active object for a modem driven by AT commands. The beaten path approach is to send AT command and sleep or wait for the OK response. However, the ERROR responses or some other unsolicited responses are harder to manage this way. A hierarchical state machine approach, on the other hand, can deal with all this in an elegant way because a state machine doesn't block and can handle any event sequence. I've attached a state machine sketch that...
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Hi dood444, I'm not aware of a ready-to-use example of an active object for a modem driven by AT commands. The beaten path approach is to send AT command and sleep or wait for the OK response. However, the ERROR responses or some other unsolicited responses are harder to manage this way. A hierarchical state machine approach, on the other hand, can deal with all this in an elegant way. I've attached a state machine sketch that could give you an idea how you might approach something like that. I'm...
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Hi dood444, I'm not aware of a ready-to-use example of an active object for a modem driven by AT commands. The beaten path approach is to send AT command and sleep or wait for the OK response. However, the error responses or some other unexpected responses are harder to manage this way. A hierarchical state machine approach, on the other hand, can deal with all this in an elegant way. I've attached a state machine sketch that could give you an idea how you might approach something like that. I'm...
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Hi dood444, I'm not aware of a ready-to-use example of an active object for a modem driven by AT commands. The beaten path approach is to send AT command and sleep or wait for OK response. However, the error responses or some other unexpected responses are harder to manage this way. A hierarchical state machine approach, on the other hand, can deal with all this in an elegant way. I've attached a state machine sketch that could give you an idea how you might approach something like that. I'm assuming...
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Hi dood444, I'm not aware of a ready-to-use example of an active object for a modem driven by AT commands. The beaten path approach is to send AT command and sleep or wait for OK response. However, the error responses or some other unexpected responses are harder to manage this way. A hierarchical state machine approach, on the other hand, can deal with all this in an elegant way. I've attached a state machine sketch that could give you an idea how you might approach something like that. I'm assuming...
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QM 6.2.2 doesn't show GUI on Ubuntu 22.04
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Fixed in QM 6.2.3 --MMS
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Hi Dhiren, Under the preemptive QK kernel, every ISR that potentially posts/publishes events needs to call the QK_ISR_ENTRY()/QK_ISR_EXIT() macros. (The macros are just called, not "implemented" because they are already provided in the QK port). My question is whether I should implement the same for all the interrupts even though none of these interrupts are generating any event for the active object in my program If an ISR does not produce any events, it cannot activate any Active Objects, so it...
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Hi Dhiren, Under the preemptive QK kernel, every ISR that potentially posts/publishes events needs to call the QK_ISR_ENTRY()/QK_ISR_EXIT() macros. (The macros are just called, not "implemented" because they are already provided in the QK port). My question is whether I should implement the same for all the interrupts even though none of these interrupts are generating any event for the active object in my program If an ISR does not produce any events, it cannot activate any Active Objects, so it...
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Hi Dhiren, Under the preemptive QK kernel, every ISR that potentially posts/publishes events needs to call the QK_ISR_ENTRY()/QK_ISR_EXIT() macros. (The macros are just called, not "implemented" because they are already provided in the QK port). My question is whether I should implement the same for all the interrupts even though none of these interrupts are generating any event for the active object in my program If an ISR does not produce any events, it cannot activate any Active Objects, so it...
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Thanks a lot for the comments. The just released QM version 6.2.2 fixes a couple of minor issues precisely with submachines. But this most likely will be the last QM version that has submachines. From what I hear from the trenches, embedded developers have been often confused and misused submachines and submachine states. Some folks used submachines in place of regular composite states, which is overkill. Some other folks used submachine states only because they were rendered in a different color,...
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Thanks a lot for the comments. The just released QM version 6.2.2 fixes a couple of minor issues precisely with submachines. But this most likely will be the last QM version that has submachines. From what I hear from the trenches, embedded developers have been often confused and misused submachines and submachine states. Some folks used submachines in place of regular composite states, which is overkill. Some other folks used submachine states only because they were rendered in a different color,...
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Hi Harry, Yes, the very reason why the "dual-mode" QXK has been designed is to enable hybrid approach, where part of the system is event-driven, and the other part is traditional sequential blocking code. However, and this is crucial, even with a "dual-mode" kernel like QXK, event-driven Active Objects should never block internally. Blocking must be confined to the traditional threads only (QXThreads in QXK). An alternative to QXK is any traditional RTOS kernel, such as ThreadX, embOS, Zephyr, or...
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Dear QP/QM community: As you might have noticed, QP framework is undergoing functional safety certification to industry standards, such as IEC 61508. Certification of this sort requires taking a hard look at every complexity within the software and the surrounding tools. To this end, QM submachines and submachine-states add disproportionate complexity for relatively low benefit. Therefore, the big question to the QP/QM user community is: How widely are the submachines actuall used in real projects?...
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Dear QP/QM community: As you might have noticed, QP framework is undergoing functional safety certification to industry standards, such as IEC 61508. Certification of this sort requires taking a hard look at every complexity within the software and the surrounding tools. To this end, QM submachines and submachine-states add disproportionate complexity for relatively low benefit. Therefore, the big question to the QP/QM user community is: How widely are the submachines actuall used in the community?...
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Hi Eddie, what is the difference/advantage when using the the full qp kernel over qutest stab for intergration testing? In unit tests, you typically don't use the complete QP framework (or complete RTOS, if you were to use a traditional RTOS instead of QP). At this lowest level of testing you simply don't have (and you don't want) a full application. You want to have just enough infrastructure to test one Active Object in isolation, both on the target and on the host. For this you simply cannot use...
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Hi Eddie, what is the difference/advantage when using the the full qp kernel over qutest stab for intergration testing? In unit tests, you typically don't use the complete QP framework (or complete RTOS, if you were to use a traditional RTOS instead of QP). At this lowest level of testing you simply don't have (and you don't want) a full application. You want to have just enough infrastructure to test one Active Object in isolation, both on the target and on the host. For this you simply cannot use...
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Hi Munadir, I couldn't test lesson-20 in particular, because that one is based on the TI CCS project with GNU-ARM, which needs to be updated for the newer CCS version. (That's why the Eclipse-based TI CCS has been dropped after lesson-20 in favor of more usable tools.) But anyway, in all earlier lessons (starting with lesson-16), the SYSCTL_RCC register is NOT changed in any way. Therefore, it has the default value out of reset of 0x078E3AD1 (see "TivaC Manual", page 254), which I have verified with...
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Hi Munadir, I couldn't test lesson-20 in particular, because that one is based on the TI CCS project with GNU-ARM, which needs to be updated for the newer CCS version. (That's why the Eclipse-based TI CCS has been dropped after lesson-20 in favor of more usable tools.) But anyway, in all earlier lessons (starting with lesson-16), the SYSCTL_RCC register is NOT changed in any way. Therefore, it has the default value out of reset of 0x078E3AD1 (see "TivaC Manual", page 254). This setting corresponds...
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Hi Giulio, Is simply putting the Python script to sleep for a certain period before checking the expectations from the target enough to achieve what Matteo wants? The problem is with choosing this "certain period", so that the QSpy output generated by the test fixture is repeatable. If the delay is one-sided (e.g., the test script must wait for XX milliseconds or longer) than it might work. But if this is a two-sided delay (e.g., more than XX but less than YY milliseconds), then it would be problematic....
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Hi Munadir, I couldn't test lesson-20 in particular, because that one is based on the IT CCS project with GNU-ARM, which needs to be updated for the newer CCS version. (That's why the Eclipse-based TI CCS has been dropped after lesson-20 in favor of more usable tools.) But anyway, in all earlier lessons (starting with lesson-16), the SYSCTL_RCC register is NOT changed in any way. Therefore, it has the default value out of reset of 0x078E3AD1 (see "TivaC Manual", page 254). This setting corresponds...
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Hi Giulio, The Cmake support in QP is currently designed for building "real" applications and not test fixtures for QUTest. For that you would need another layer of conditionals. I would recommend not to use Cmake for test fixtures at this time. --MMS
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Hi Giulio, The Cmake support in QP is currently designed for building "real" applications and not test fixtures. For that you would need another layer of conditionals. I would recommend not to use Cmake for test fixtures at this time. --MMS
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Hi Giulio, Is simply putting the Python script to sleep for a certain period before checking the expectations from the target enough to achieve what Matteo wants? I don't think so. The problem is with choosing this "certain period", so that's repeatable.
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Hi Ella, Thank you for your interest in the "Modern Embedded Systems Programming" course. The fact that you're talking about a Makefile shows that you've not following the provided projects directly, but rather you're trying to do it all manually, on a Linux host using some TI references. I'm saying this because the provided projects for lesson-04 are for IAR or KEIL on the Windows host. Please click on the provided link to see how these projects look. I think that your approach is very difficult...
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Hi Eddie, The <qpc|qpcpp>/test/ example does not have a posix makefile to show how to build for posix</qpc|qpcpp> It seems to me that you're getting confused about the official QP releases and the immediate chantges on GitHub. Of couse, at this point the changes are NOT in the official release yet, so they are NOT in the directory <qpc|qpcpp>/test/examples. In my previous post I referred to the immediate changes on GitHub. These changes are located in the qpcpp-examples GitHub repo, which is a sub-module...
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This seems to me a very common problem of mixing the heavy sequential programming with polling/blocking and lightweight event-driven programming that should not block (or poll). Mixing the two paradigms gives you the worst of both worlds. On the one hand, you have very high CPU utlization caused by polling, but you also have event-driven state machines that must react quickly. My recommendation is always to avoid such situations and never mix blocking/polling with the event-driven paradigm in the...
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Hi mricciutelli, Tests with QUTest with real kernels, such as QK or QXK are provided in the directory qpc/test (or equivalent for qpcpp). But please read the related discussion thread, for the more general comments about various testing levels with QUTest (unit testing vs. integration testing). --MMS
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Thanks for reporting. The assertion IDs should be unique (mostly), so this will be fixed. Regarding the limits on state machine complexity, they are now enforced more strictly as part of the functional safety updates. Specifically, now all loops must have a numerical upper bound. The currently limits can be increased slightly but the formal testing will be limited to what is provided in the official code. I hope this makes sense to you. --MMS
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Hi Clay, Thank you for reporting, but you're using an older QM version. If you just look at the QM revision history of your version 5.1.1 and scroll up just a little bit, you'll see that the issue has been fixed in QM version 5.1.4 (bug#307). Any chance that you can just use a newer (preferably the latest) QM? --MMS
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Thank you for reporting, but before taking a deeper look, it seems that you're trying to overload a function on its return type. Such overloading was never allowed in C++, so perhaps the issue is moot anyway. Please check. --MMS
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Hi June, Your design to publish an event that carries only one character at a time is horribly inefficient. Imagine that you write a letter, but instead of sending one letter with the whole message, you send hundreds of letters, each containing one character packaged in its own envelope with a postage stamp and address. Sounds ridiculous, doesn't it? Yet, this is precisely what you're doing. Your system handled this somehow up to this point, but the design is so horribly expensive that at some point...
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Hi June, Your design to publish an event that carries only one character at a time is horribly inefficient. Imagine that you write a letter, but instead of sending one letter with the whole message, you send hundreds of letters, each containing one character packaged in its own envelope with a postage stamp and address. Sounds ridiculous, doesn't it? Yet, this is precisely what you're doing. Your system handled this somehow up to this point, but the design is so horribly expensive that at some point...
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Hi June, Your design to publish an event that carries only one character at a time is horribly inefficient. Imagine that you write a letter, but instead of sending one letter with the whole message, you send hundreds of letters, each containing one character packaged in its own envelope with a postage stamp and address. Sounds ridiculous, doesn't it? Yet, this is precisely what you're doing. Your system handled this somehow up to this point, but the design is so horribly expensive that at some point...
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Hi June, Your design to publish an event that carries only one character at a time is horribly inefficient. Imagine that you write a letter, but instead of sending one letter with the whole message, you send hundreds of letters, each containing one character packaged in its own envelope with a postage stamp and address. Sounds ridiculous, doesn't it? Yet, this is precisely what you're doing. Your system handled this somehow up to this point, but the design is so horribly expensive that at some point...
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Hi June, Your design to publish an event that carries only one character at a time is horribly inefficient. Imagine that you write a letter, but instead of sending one letter with the whole message, you send one character at a time. So you end up sending hundreds of letters, each in its own envelope with a postage stamp and address. Sounds ridiculous, doesn't it? Yet, this is precisely what you're doing. Your system handled this somehow up to this point, but the design is so horribly expensive that...
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Hi June, Your design to publish an event that carries only one character at a time is horribly inefficient. Imagine that you write a letter, but instead of sending one letter with the whole message, you send one character at a time. So end up sending hundreds of letters, each in its own envelope with a postage stamp and address. Sounds ridiculous, doesn't it? Yet, this is precisely what you're doing. Your system handled this somehow up to this point, but the design is so horribly expensive that at...
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Hi, The behavior you describe is incorrect and I don't think it can even happen in auto-generated code. Are you generating your code automatically from the QM model, or are you still coding manually? --MMS
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QM puts some limits on what can be copy-and-pasted within a model and between different models because of the undo-redo feature. Specifically, it is awfully complex to undo a paste operation of a whole complex piece of interconnected state machine. I hope you can see the complications. --MMS
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The code for lesson #4 does not use the volatile keyword because it was not introduced yet. However, the project carefully uses compiler optimization level "none". You can try this with any compiler (i.e., turn off any kind of optimization). The code should work with that setting. --MMS
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I'm glad to hear that you're back in business :-) The most important lesson to remember from this is that "in embedded systems nothing works until everything works". I explain this in one of my later lessons of the course. This law of nature has deep implications for how you must work. To make progress you must ensure that the project keeps working before you make any changes. Then, after every little change, you must check that the project keeps working. This means that you can change only a single...
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I typically handle this by opening one model in one instance of QM and the other model in the second instance of QM. Then you can just copy and paste between the two instances of QM. --MMS
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Hi Bymalba, Thank you for your interest in the "Modern Embedded Programming Course" on YouTube. The posted project for lesson #27 and the STM32 NUCLEO-C031 board was incomplete in that it didn't use the GPIO interrupt. Consequently, there was no call to QXSempahore_singal(). Therefore, I don't know how you implemented that feature. But generally, STM32 peripherals are ticky to set up correctly, so I'm not surprised that it might not work for you. But anyway, the download for lesson #27 has been updated....
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Hi June, The error Q_ERROR_CRIT_(110) while posting an event fires when the event queue gets overflown and the QP framework cannot post an event. To troubleshoot this issue, you need to look how this failing QActive::post_() function was called. I'm not sure what you mean by "I run the long message receiving..." But I suspect that the change in hardware caused the system to get flooded with interrupts (e.g., you might have a "ringing" interrupt line that interrupts the CPU constantly). This might...
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Hi June, The error Q_ERROR_CRIT_(110) while posting an event fires when the event queue gets overflown and the QP framework cannot post an event. To troubleshoot this issue, you need to look how this failing QActive::post_() function was called. I'm not sure what you mean by "I run the long message receiving..." But I suspect that the change in hardware caused the system to get flooded with interrupts (e.g., you might have a "ringing" interrupt line that interrupts the CPU constantly). This might...
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The reported issues have been corrected in qview.py 7.4.2, which was just released to PyPi: - https://pypi.org/project/qview/ Please re-install qview with pip. Specifically, qview.py 7.4.2 has been scanned with pylint and several errors and recommendations have been fixed and implemented. --MMS
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Hi Eddie, The QS time tamp is provided by the QS_onGetTime() callback in your code (typically Board Support Package). It is just an integer number with a configurable dynamic range. I don't understand your comment about connection to "Tcl associative array". --MMS
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OK, got ya. That 8-year old post talks about two things: (1) what QS time stamp is and (2) how the old QUTest test scripts or QView scripts (written in Tcl back then) handled formatting of the timestamp. Obviously, the Tcl stuff is no longer relevant because both QUTest and QView moved on to Python. --MMS
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OK, got'ya. That 8-year old post talks about two things: (1) what QS time stamp is and (2) how the old QUTest test scripts or QView scripts (written in Tcl back then) handled formatting of the timestamp. Obviously, the Tcl stuff is no longer relevant because both QUTest and QView moved on to Python. --MMS
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Hi Eddie, The QS time tamp is provided by the QS_onGetTime() callback in your code (typically Board Support Package). It is just an integer number with a configurable dynamic range. I don't understand your comment about connection to "Tcl associative array". --MMS
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Hi Eddie, OK, I've fixed the reported issues in the make_posix files. The updates have been checked into the qpc-examples and qpcpp-examples repos on GitHub. I'm at the point now were I would like to setup integration testing on the target... Yes, QUTest can be used for integration tests as well. In that case, you typically run the whole application on top of the real-time kernel of your choice (e.g., QK or a 3rd-party RTOS, or POSIX). This is in contrast to unit tests, where you test isolated Active...
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Hi Eddie, OK, I've fixed the reported issues in the make_posix files. The updates have been checked into the qpc-examples and qpcpp-examples repos on GitHub. I'm at the point now were I would like to setup integration testing on the target... Yes, QUTest can be used for integration tests as well. In that case, you typically run the whole application on top of the real-time kernel of your choice (e.g., QK or a 3rd-party RTOS, or POSIX). This is in contrast to unit tests, where you test isolated Active...
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Hi Eddie, The QUTest DPP examples have "lost" the ability to pass command-line arguments from invocation of the test fixture. Specifically, the main() in the fixtures didn't take or pass the usual argc, argv parameters to QS_init(). This worked fine when target and host are identical, but obviously stopped working when they are different, as is the case of the POSIX tests. So, the problem was: int main() { QF_init(); // initialize the framework and the underlying RT kernel BSP_init(); // initialize...
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Hi Eddie, Have you watched the video?
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Thank you for reporting! This is not a bug, but rather a misunderstanding of QM documentation for specifying namespaces for packages. . A namespace is specified as the whole prefix, such as NAMESPACE::. I have attched a small QM model (almost identical to yours), but with properly specified namespace (see namespace_test.qm). Undarstandably, you might be taking the narrow C++ point of view, but QM supports also C and perhaps other languages in the future (e.g., Python or Rust). In those other languages,...
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Code generation for namespaces
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Thank you for reporting! This is not a bug, but rather a misunderstanding of QM documentation for specifying namespaces for packages. . A namespace is specified as the whole prefix, such as NAMESPACE::. I have attched a small QM model (almost identical to yours), but with properly specified namespace (see namespace_test.qm). Undarstandably, you might be taking the narrow C++ point of view, but QM supports also C and perhaps other languages in the future (e.g., Python or Rust). In those other languages,...
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QM loses the last character while generatig code from exported files
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Fixed in QM 6.1.2
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Hi Andrei, Thanks a lot for your interest in QP! I'm sorry to hear about your getting-started issues. It seems that you're using Windows, which is good because the QP-bundle for Windows contains all the tools you need. The video you should watch is "Getting Started with QP Frameworks". You should be able to follow along exactly as shown in the video. I had to install the MinGW in order to run the project's makefile... You should not need to install MinGW separately, as it is already included in the...
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Hi Felix, Thank you for your interst in QP/C++. The QP frameworks (QP/C and QP/C++) have been working on POSIX for the past 20 years. Two QP ports to POSIX are supported: - POSIX-QV (Single Threaded) - POSIX (Multithreaded) Please also watch the the video Running QP Real-Time Frameworks and QP/Spy Software Tracing on Embedded Linux The first port (POSIX-QV) seems to be of more interest to you because it executes all active objects in a single thread (the main() thread). One issue that has proven...
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Apparently gcc is not in your PATH. Please open a command prompt and type path and post a screen shot from this. I have attached a screen shot from my system (see path-qtools.png). The highlighted part of the PATH variable was set during the QP-bundle installation. You can also see the command where gcc, which prints where the gcc compiler is found. I'm not sure how you've installed QP-bundle, but perhaps you've declined the option of augmenting your PATH, in which case you would have to do it manually....
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Hi Jim, I’m sure I’m not the first person to make extensive use of both DMA Abosultely, the I/O has always been much slower than the CPU, so that's normal and expected that most data transfers won't finish in a single non-blocking RTC step (with DMA or any other method). That's why you have a state machine to pick up in the next RTC step where you left off from the previous one. I mean, your DMA will fire an interrupt when it's done, so you can post an event to trigger that next RTC step, right?...
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Hi Jim, I’m sure I’m not the first person to make extensive use of both DMA Abosultely, the I/O has always been much slower than the CPU, so that's normal and expected that most data transfers won't finish in a single non-blocking RTC step (with DMA or any other method). That's why you have a state machine to pick up in the next RTC step where you left off from the previous one. I mean, your DMA will fire an interrupt when it's done, so you can post an event to trigger that next RTC step, right?...
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Hi Felix, Thank you for your interst in QP/C++. The QP frameworks (QP/C and QP/C++) have been working on POSIX for the past 20 years. Two QP ports to POSIX are supported: - POSIX-QV (Single Threaded) - POSIX (Multithreaded) The first port (POSIX-QV) seems to be of more interest to you because it executes all active objects in a single thread (the main() thread). One issue that has proven tricky is the provision of periodic time source to the QP application under POSIX. This is really a side issue...
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Hi Andrei, Thanks a lot for your interest in QP! I'm sorry to hear about your getting-started issues. It seems that you're using Windows, which is good because the QP-bundle for Windows contains all the tools you need. The video you should watch is "Getting Started with QP Frameworks". You should be able to follow along exactly as shown in the video. I had to install the MinGW in order to run the project's makefile... You should not need to install MinGW separately, as it is already included in the...
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Hi Andrei, Thanks a lot for your interest in QP! I'm sorry to hear about your getting-started issues. It seems that you're using Windows, which is good because the QP-bundle for Windows contains all the tools you need. The video you should watch is "Getting Started with QP Frameworks". You should be able to follow along exactly as shown in the video. I had to install the MinGW in order to run the project's makefile... You should not need to install MinGW separately, as it is already included in the...
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Hi Jim, I’m sure I’m not the first person to make extensive use of both DMA Abosultely, the I/O has always been much slower than the CPU, so that's normal and expected that most data transfers won't finish in a single non-blocking RTC step (with DMA or any other method). That's why you have a state machine to pick up in the next RTC step where you left off from the previous one. I mean, your DMA will fire an interrupt when it's done, so you can post an event to trigger that next RTC step, right?...
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Hi Jim, I’m sure I’m not the first person to make extensive use of both DMA Abosultely, the I/O has always been much slower than the CPU, so that's normal and expected that most data transfers won't finish in a single non-blocking RTC step (with DMA or any other method). That's why you have a state machine to pick up in the next RTC step where you left off from the previous one. I mean, your DMA will fire an interrupt when it's done, so you can post an event to trigger that next RTC step, right?...
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Hi Jim, I’m sure I’m not the first person to make extensive use of both DMA Abosultely, the I/O has always been much slower than the CPU, so that's normal and expected that most data transfers won't finish in a single non-blocking RTC step (with DMA or any other method). That's why you have a state machine to pick up in the next RTC step where you left off from the previous one. I mean, your DMA will fire an interrupt when it's done, so you can post an event to trigger that next RTC step, right?...
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Hi Jim, I'm trying to understand what is it that you're requesting, so I'm trying to build a mental model of how this could be implemented. It seems to me that your "pause function" should be equivalent to just deferring all events to a single deferred queue, isn't it? If so, this is how you could implement it without any upheaval to the framework itself (?) Also, why do you need two AOs for handling the SPI channels (orthogonal components)? I mean, if the two have to message each other so heaviliy,...
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The use of the standard heap is a separate issue outside the scope of the QP framework. The framework does not use it internally and does not force the QP applications to use it. So, if you decide to use the standard heap in your concurrent application, you take upon yourself all the responsibility to do this safely. The fist approach I would consider is to safely encapsulate the heap inside a single Active Object. This is precisely what you should do with any other resource. Just don't share the...
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The use of the standard heap is a separate issue outside the scope of the QP framework. The framework does not use it internally and does not force the QP applications to use it. So, if you decide to use the standard heap in your concurrent application, you take upon yourself all the responsibility to do this safely. The fist approach I would consider is to safely encapsulate the heap inside a single Active Object. This is precisely what you should do with any other resource. Just don't share the...
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Hi Harry, All the recent changes to the QP framework are related to the functional safety certification. One of the obvious concerns of every safety standard is the error handling policy, which in QP is centered around the "assertion programming" and "failure assertion programming" (terms from IEC 61508). In case of an assertion failure, the system is already considered unsafe, and so it is NOT allowed to service interrupts, do context switches, etc. The only actions allowed to perform in the error...
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Hi Harry, All the recent changes to the QP framework are related to the functional safety certification. One of the obvious concerns of every safety standard is the error handling policy, which in QP is centered around the "assertion programming" and "failure assertion programming" (terms from IEC 61508). In case of an assertion failure, the system is already considered unsafe, and so it is NOT allowed to service interrupts, do context switches, etc. The only actions allowed to perform in the error...
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Hi Harry, All the recent changes to the QP framework are related to the functional safety certification. One of the obvious concerns of every safety standard is the error handling policy, which in QP is centered around the "assertion programming" and "failure assertion programming" (terms from IEC 61508). In case of an assertion failure, the system is already considered unsafe, and so it is NOT allowed to service interrupts, do context switches, etc. The only actions allowed to perform in the error...
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Indeed, macros Q_NEW() and Q_NEW_X() have been recently deprecated. However, they have been so frequently used in the QP/C++ code that it will be a while until these macros will be phased out completely. What would be the now recommended way to create dynamic events? This information is provided in the documentation of the deprecated macros. Specifically, they are now replaced with function templates: QP::QF::q_new() and QP::QF::q_new_x(), respectively. Also, another question: ... is there an alternative...
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Indeed, macros Q_NEW() and Q_NEW_X() have been recently deprecated. However, they have been so frequently used in the QP/C++ code that it will be a while until these macros will be phased out completely. What would be the now recommended way to create dynamic events? This information is provided in the documentation of the deprecated macros. Specifically, they are now replaced with function templates: QP::QF::q_new() and QP::QF::q_new_x(), respectively. Also, another question: ... is there an alternative...
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Absolutely, interrupts must NOT fire during the whole startup sequence and the QP Framework is NOT ready to receive them until QF::run(). But interrupts won't fire unless they are configured and explicitly enabled in the NVIC. You don't need to disable them with PRIMASK. I hope you see my point. Regarding the re-design of QView, it's done alredy. Please take a look at the latest release: https://www.state-machine.com/qtools/history.html#qtools_7_4_1. I'll make a separate post about the new QView...
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OK, so you've found the root cause of the problem. The simplest fix would be to just delete the cpsid i instruction from the Reset_Handler in the startup code. Most likely, you should modify the standard startup code anyway because it typically has endless loops (denial of service) hard-coded in the exception handlers. So, removing the cpsid i instruction shouldn't be such a big deal. Regarding QView, I see your point. The current QView design is similar to QUTest in that the customization script...
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OK, so you've found the root cause of the problem. The simplest fix would be to just delete the 'cpsid i' instruction from the Reset_Handler in the startup code. Most likely, you should modify the standard startup code anyway because it typically has endless loops (denial of service) hard-coded in the exception handlers. So, removing the 'cpsid i' instruction shouldn't be such a big deal. Regarding QView, I see your point. The current QView design is similar to QUTest in that the customization script...
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Any particular reason why you are not using the latest QP (currently 7.3.4)? --MMS
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Hi M, From a quick scan of your GDB session, it seems to me that your CPU is using the PRIMASK register, not BASEPRI. I think this is the case because I see the line (which sets PRIMASK): 275 __asm volatile ("cpsid i"); You don't bother mentioning which Cortex-M CPU you're using, but it would be helpful to know that you're running Cortex-M0 or M0+ (ARMv6-M architectures). Your GDB output might be misleading because ARMv6-M does not even have the BASEPRI register. So, plese repeat the steps, but monitor...
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Hi M, From a quick scan of your GDB session, it seems to me that your CPU is using the PRIMASK register, not BASEPRI. I think this is the case because I see the line (which sets PRIMASK): 275 __asm volatile ("cpsid i"); You don't bother mentioning which Cortex-M CPU you're using, but it would be helpful to know that you're running Cortex-M0 or M0+ (ARMv6-M architectures). Your GDB output might be misleading because ARMv6-M does not even have the BASEPRI register. So, plese repeat the steps, but monitor...
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Hi M, From a quick scan of your GDB session, it seems to me that your CPU is using the PRIMASK register, not BASEPRI. I think this is the case because I see the line (which sets PRIMASK): 275 __asm volatile ("cpsid i"); You don't bother mentioning which Cortex-M CPU you're using, but it would be helpful to know that you're running Cortex-M0 or M0+ (ARMv6-M architectures). Your GDB output mitht be misleading because ARMv6-M does not even have the BASEPRI register. So, plese repeat the steps, but monitor...
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Hi M, From a quick scan of your GDB session, it seems to me that your CPU is using the PRIMASK register, not BASEPRI. I think this is the case because I see the line (which sets PRIMASK): 275 __asm volatile ("cpsid i"); You don't bother mentioning which Cortex-M CPU you're using, but it would be helpuf to know that you're running Cortex-M0 or M0+ (ARMv6-M architectures). Your GDB output mitht be misleading because ARMv6-M does not even have the BASEPRI register. So, plese repeat the steps, but monitor...
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The extern "C" directive has been removed from the qpc.h header file in the recent QP/C uploads to GitHub. The reasons are explained below: C and C++ code can be mixed in two different ways: C code can be compiled as "C" and C++ code obviously as "C++". Then the two have to be linked. This use requires extern "C" {...} around the C code headers included in C++. C code can be compiled as "C++" (and C++ code obviously as "C++"). Then the two have to be linked. This use does NOT require extern "C" {...}....
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As you found out, you're hitting assertion qv_port:110. The reason for this assertion is explained in the soruce code: "The assertion means that this critical section CANNOT nest." These assertions (qv_port:110/111) have been introduced after the QP/C++ has been scruitinized for strct balancing of critical sections. Since all critical sections now must be balanced, the nesting of critical section indicates an error. I hope you see the point. So, apparently, your code enters a critical section or...
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As you found out, you're hitting assertion qv_port:110. The reason for this assertion is explained in the soruce code: "The assertion means that this critical section CANNOT nest." These assertions (qv_port:110/111) have been introduced after the QP/C++ has been scruitinized for strct balancing of critical sections. Since all critical sections now must be balanced, the nesting of critical section indicates an error. I hope you see the point. So, apparently, your code enters a critical section or...
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As you found out, you're hitting assertion qv_port:110. The reason for this assertion is explained in the soruce code: "The assertion means that this critical section CANNOT nest." The se assertions (qv_port:110/111) have been introduced after the QP/C++ has been scruitinized for strct balancing of critical sections. Since all critical sections now must be balanced, the nesting of critical section indicates an error. I hope you see the point. So, apparently, your code enters a critical section or...
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Hi Ed, I know, MIPS was interesting. So was/is the Renesas RX (excellent CPU, better than Cortex-M in my view). But all these are niche processors that require a different port, different compiler, different development environment, different everything. All this is incredibly expensive and is a huge drag on progress. (I hope you realize that for every new QP version, the old stuff has to be adapted, updated, re-tested, etc.) The bottom line is that the niche processors don't earn their keep. The...
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Copying QP events into Qt event queues sounds like the safest option. Passing pointers to QP events inside some other data structures is probably incorrect because it leads to sharing the event instances. The problem is that the QP Framework does not "know" about such sharing, so it might recycle an event prematurely (so your pointer to event will be "dangling"). I hope that this makes sense to you. --MMS
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