Activity for Quantum Leaps
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Quantum Leaps modified ticket #398
8.1.3 postx_() in FreeRTOS port enters critical section twice
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8.1.3 postx_() in FreeRTOS port enters critical section twice
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Hi Mike, I change hist_lidClosed = &Washer_ready... I don't know if this can be a problem,... It looks like a problem to me because this is very confusing and does not really model the reality. Your job is not to "cheat" (to make it "work" in this particular stage of your modeling), but to capture the true essence of the behavior. Also, I'm not sure if I understand your use of state hierarchy. For example, the OPEN transition should be directly from the "lidClosed" to "lidOpen". Your current model...
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Hi Mike, Thanks a lot for your interest and attention to detail. Indeed, the details of the "history" example have changed over the years to demonstrate both types of history (shallow and deep, see attached state diagram). And you are right; these changes made the ToasterOven behave in a way that a real appliance should not behave (the oven should never turn on after pressing OFF). You have several options to fix that: Your choice to make the doorOpen:OFF transition go straight to the "off" state...
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Hi Mike, Thanks a lot for your interest and attention to detail. Indeed, the details of the "history" example have changed over the years to demonstrate both types of history (shallow and deep, see attached state machine, see attached state diagram). And you are right; these changes made the ToasterOven behave in a way that a real appliance should not behave (the oven should never turn on after pressing OFF). You have several options to fix that: Your choice to make the doorOpen:OFF transition go...
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Hi Mark, As a commercial licensee, please contact Quantum Leaps support (support@state-machine.com) for the QSPY source code. --MMS
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Hi Modo, Your 10-step plan sounds a bit complicated. It seems that you prefer the very traditional code partitioning, so just do that. Specifically, instead of manually "removing the delimit portions that QM controls", just generate the traditional header files (.h/.hpp) with your class declarations ( $declare {} directives). Then simply include those QM-generated headers in your external source files (.cpp). QM doesn't need to "know" about those source files at all, so you can manage them completely...
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Hi Modo, Your 10-step plan sounds a bit complicated. It seems that you prefer the very traditional code partitioning, so just do that. Specifically, instead of manually "removing the delimit portions that QM controls", just generate the traditional header files (.h/.hpp) with your class declarations ( $declare {} directives). Then simply include those QM-generated headers in your external source files (.cpp). QM doesn't need to "know" about those source files at all, so you can manage them completely...
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Hi Modo, QM allows you to organize your code any way you see fit (see QM code engineering philosophy). Consequently, you can implement all/most/some actions and/or guards on your state machines as (member) functions of your state machine class. You can then implement those functions in any number of files: completely outside QM or within QM as regular files or external files. If the implementation files are outside QM, they won't be obviously overwritten when QM re-generates code. If the files are...
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Hi Giulio, First, let me clarify that if your sensors can permanently overwhelm your communication bandwidth (RS-485 in your case), no software design is going to fix it. Unfortunately, even QP cannot pull off such magic. Now, your problem seems to me two-fold. First, you worry about event pools, meaning that you have a buffering problem. Second, you think about coordinating the sensor components, which is a coordination problem. Regarding coordination, your SensorManager seems to be the ideal candidate....
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Hi Giulio, First, let me clarify that if your sensors can permanently overwhelm your communication bandwidth (RS-485 in your case), no software design is going to fix it. Unfortunately, even QP cannot pull off such magic. Now, your problem seems to me two-fold. First, you worry about event pools, meaning that you have a buffering problem. Second, you think about coordinating the sensor components, which is a coordination problem. Regarding coordination, your SensorManager seems to be the ideal candidate....
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Hi dillang, Thank you for reporting. Indeed, the poke() command works currently differently in qview than in qutest, but it would be better if they were consistent. This was fixed in QView 8.1.3 just uploaded to PyPi. You can upgrade to this version by typing: pip install qview --upgrade And here is an example of using peek()/poke() # example of a custom command def cust_command(self): string_to_inject = "StringContents" QView.current_obj(QView.OBJ_AP, "my_string_length") QView.poke(0, 2, pack("<H",...
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Also I reviewed the code of rt-thread (scheduler_mp.c for MP mode) and I feel like it doesn't support locking the scheduler to a given priority level. I'm not RT-Thread expert, but my quick glance at the documentation shows that RT-Thread seems to support selective scheduler locking to the specified level. Please take a look at the following thread management functions: rt_err_t rt_sched_lock(rt_sched_lock_level_t * plv) rt_err_t rt_sched_unlock(rt_sched_lock_level_t level) rt_err_t rt_sched_unlock_n_resched(rt_sched_lock_level_t...
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Wrong assertion in qep_hsm.
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Fixed in QP/C/C++ 8.1.2, where ascrutinizedll assertions have been scruitinized and tested (100% MC/DC). --MMS
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Horizontal navigation/panning with shift + scroll wheel only works in left direction
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Fixed in QM 7.0.2. --MMS
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QTimeEvt_noActive() behaves incorrectly in QP/C/C++ 8.1.0
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Fixed in QP/C/C++ 8.1.2 --MMS
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QPCPP 8.1.1 build errors with -Wsign-conversion
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Fixed in QP/C++ 8.1.2. --MMS
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QP 8.1.1, file qsafe.h compilation errors
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Fixed in QP/C 8.1.2. --MMS
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QM 7.0.1 tab title bug
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Fixed in QM 7.0.2. --MMS
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Hi Borut, Alignment is part of the type, so you might try to specify the type as __ALIGNED(4) uint8_t. --MMS
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Generated by QM wo __ALIGNED(4) ........ typedef struct { // protected: QActive super; // public: QTimeEvt timeEvt; QTimeEvt unlockTmo; uint8_t pos; uint16_t delay[13]; uint8_t bcoIdx; uint8_t m95op; uint16_t m95Token; bool m95Busy; M95Op m95LastOp; uint32_t m95LastAddr; uint32_t m95LastLen; (__ALIGNED(4) uint8_t m95Buf[sizeof(CiaNvData)]; // ← HERE) ????? CiaNvData nv; char settingsPw[32]; bool settings_unlocked; char pendingPw[32]; bool expectConfirm; CiaMode mode; } Cia; How to add __ALIGNED(4)...
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Speaking of the wishes to the HW team, apart from one or two GPIO pins for timing, you should always request the TX/RX pins for the UART for tracing/debugging. All these pins don't need to be populated in the production boards but at least the test points should be provided. --MMS
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Hi Nik, My question is, how would you go about detecting every last bit of blocking code? Real-time programming is not necessarily about "detecting every last bit of blocking (or polling) code", but generally you are supposed to know how long things take in your software. This "inconvenient truth" applies to all real-time systems, regardless if based on a superloop, RTOS, or event-driven framework like QP. To this end (knowing how long things take), avoidance of blocking makes your life easier because...
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Hi Mark, I'm not sure why your compiler rejects _Static_assert because it should be generally supported. But you're right that it would be better to use static_assert or Q_ASSERT_STATIC(), which is defined in all QP/C++ ports (typically as static_assert). Anyway, the error comes from the qpcpp.hpp header file, which is the backward-compatibility layer. Specifically, this static assertion informs you that the event signals are no longer configurable, but if you still use the deprecated Q_SIGNAL_SIZE,...
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Hi Mark, I'm not sure why your compiler rejects _Static_assert because it should be generally supported. But you're right that it would be better to use static_assert or Q_ASSERT_STATIC(), which is defined in all QP/C++ ports (typically as static_assert). Anyway, the error comes from the qpcpp.hpp header file, which is the backward-compatibility layer. Specifically, this static assertion informs you that the event signals are no longer configurable, but if you still use the deprecated Q_SIGNAL_SIZE,...
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Hi guruprasad, To run QUTest on any embedded target board, you need a way to communicate with that target. Embedded targets communicate with the QSPY host utility via UART, and the specifics of this communication are implemented in the qutest_port.c file. In other words, the CPU type (ESP32 or other) does not matter. Rather, you need to know which UART you wish to use for the QSPY communication and then you need to implement the following customization callbacks: QS_onStartup() QS_onCleanup() QS_onReset()...
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Hi guruprasad, To run QUTest on any embedded target board, you need a way to communicate with that target. Embedded targets communicate with the QSPY host utility via UART, and the specifics of this communication are implemented in the qutest_port.c file. In other words, the CPU type (ESP32 or other) does not matter. Rather, you need to know which UART you wish to use for the QSPY communication and then you need to implement the following customization callbacks: QS_onStartup() QS_onCleanup() QS_onReset()...
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Hi Gene, WWMD? Well, I would just use the existing QP event management. I mean, event parameters (payload) are the data buffers managed by QP, so why not use them for DMA directly? Specifically, I would define a UART event class as something like this: typedef struct { QEvt super; // inherit QEvt uint8_t buffer[256]; // big enough for the largest expected message uint16_t nbytes; // actual number of bytes in this event } UART_Evt; Then in your UART "driver", I would dynamically allocate such a UART_Evt,...
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Hi Gene, WWMD? Well, I would just use the existing QP event management. I mean, event parameters (payload) are the data buffers managed by QP, so why not use them for DMA directly? Specifically, I would define a UART event class as something like this: typedef struct { QEvt super; // inherit QEvt uint8_t buffer[256]; // big enough for the largest expected message uint16_t nbytes; // actual number of bytes in this event } UART_Evt; Then in your UART "driver", I would dynamically allocate such a UART_Evt,...
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Hi BigRedHDL, Perhaps this issue could be addressed by partitioning the code appropriately? For example, you might package more complex actions and maybe guards in your state machines as separate functions (typically member functions of the state-machine/active-object class). Then you can put the implementation of all such action-functions in a separate file, which could be completely outside QM. Then you could use any editor you like, with code-completion, to edit the action functions. I assume...
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I'd like to get other peoples thoughts on how they use QM with their development environment. Personally, I love how QM gives me a concise picture of the state machine and to me it is much easier to navigate than scrolling around the code file. However, in my most recent project I also had a lot of times where code completion and LLMs were invaluable which then introduces this friction of editing the code in the generated file, copying it out and into the QM diagram and regenerating it. I was very...
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Hi Sander, If you already are a licensee, please contact Quantum Leaps through the contact page: https://www.state-machine.com/contact --MMS
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Hi Andrew, I'm not familiar with OpenCyphal , so it's hard for me to give authoritative advice. Of course, you are right that blocking should NOT be used inside active objects. But, as you write, blocking is only used in the example application, so hopefully it is not embedded inside the OpenCyphal library. If this is the case, I hope you will find a way to avoid blocking. Finally, if you have multiple identical "channels", you don't need to create a separate active object for each. Instead, one...
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Hi Andrew, I'm not familiar with OpenCyphal , so it's hard for me to give authoritative advice. You are, of course, right that blocking should NOT be used inside active objects. But, as you write, blocking is only used in the example application, so hopefully it is not embedded inside the OpenCyphal library. If this is the case, I hope yo will find a way to avoid blocking. --MMS
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Hi Sander, I could reproduce the issue with the transition to (deep) history and sub-machines in this older QP/C++ 7.3.4. Thank you for reporting the issue. However, I could NOT reproduce after converting sub-machines to regular composite states in the same older QP/C++ 7.3.4. I have attached the model (see sander.qm) and the state machine diagram after converting sub-machine states to regular states (see sander1.png). Also here is the output from an interactive testing session: C:\qp\qpcpp_7.3.4\examples\posix-win32\sander>build\qmsmtst...
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Hi Andrew, I have looked at the qpc-rtthread project, but the port doesn't seem quite correct to me. For example, the scheduler locking mechanism (the QF_SCHED_LOCK_() and QF_SCHED_UNLOCK_() macros in qp_port.h file are implemented as critical section. However, this leads to nesting of critical sections, unnecessarily increases interrupt latency, and prevents higher-priority threads/AOs from running. At the same time, the correct mechanism (true scheduler locking) is available in RT-Thread (the rt_sched_lock()/rt_sched_unlock()...
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Hi Andrew, I have looked at the qpc-rtthread project, but the port doesn't seem quite correct to me. For example, the scheduler locking mechanism (the QF_SCHED_LOCK_() and QF_SCHED_UNLOCK_() macros in qpc-rtthread/ports/rt-thread /qf_port.h file are implemented as critical section. However, this leads to nesting of critical sections, unnecessarily increases interrupt latency, and prevents higher-priority threads/AOs from running. At the same time, the correct mechanism (true scheduler locking) is...
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Hi Steve, I don't recall an official SST (Super Simple Tasker) port to AVR. Hower, SST is the precursor to the QK preemptive, non-blocking kernel. And there used to be a port of the QK-nano kernel to AVR (with GNU-AVR and IAR-AVR compilers). That code is part of the QP-nano framework and is still available on GitHub: https://github.com/QuantumLeaps/qpn/tree/master/ports/avr/qk MMS
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Hi Steve, I don't recall an official SST port to AVR. Hower, SST is the precursor to the QK preemptive, non-blocking kernel. And there used to be a port of the QK-nano kernel to AVR (with GNU-AVR and IAR-AVR compilers). That code is part of the QP-nano framework and is still available on GitHub: https://github.com/QuantumLeaps/qpn/tree/master/ports/avr/qk MMS
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QP 8.1.1, file qsafe.h compilation errors
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QP 8.1.1, file qsafe.h compilation errors
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QPC 8.0.4 Nesting 5 levels can make AO become unresponsive
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Fixed in QP/C/C++ 8.1.1. --MMS
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QPCPP 8.1.1 build errors with -Wsign-conversion
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Hi Giulio, Thanks a lot for sharing your work! Many people ask about specific QP examples for various peripherals, like I2C. --MMS
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Hi guruprasad, I'm not sure that I entirely understand your problem, but it seems related to the fundamental question of "How much output is generated for any given input in QUTest". So, this question has been explained in the QUTest Manual, Section "Run-to-Completion Processing". Please read. As far as the tick() command (in the script) is concerned, it corresponds to a single call to the tick processing (one call to QTIMEEVT_TICK()). So, if some Time Events get freshly armed in an RTC step triggered...
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Hi guruprasad, I'm not sure that I entirely understand your problem, but it seems related to the fundamental question of "How much output is generated for any given input in QUTest". So, this question has been explained in the QUTest Manual, Section "Run-to-Completion Processing". Please read. --MMS
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Hi Steven, I have repeated the Stellaris ICDI installation, and the most important step appears to be the correct "Folder Selection" step, where you should select the location of your KEIL uVision installation. After the installation, your KEIL uVision folder should have an updated TOOLS.INI file, where the following lines should be added as follows: [UV2] . . . [ARM] . . . TDRV19=BIN\lmidk-agdi.dll("Stellaris ICDI") . . . [ARMADS] . . . TDRV19=BIN\lmidk-agdi.dll("Stellaris ICDI") . . . Also, the...
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Hi Steven, I'm sorry to hear that your installation somehow doesn't work. It's difficult for me to troubleshoot this because I cannot reproduce the problem. I've attached a screenshot from my recent "Stellaris ICDI" add-on installation (see KEIL-5.42-Stellaris.jpg). As you can see, I have KEIL uVision 5.42.0.0 and the debugger is Stellaris ICDI. This is on Windows 11 Pro 64-bit. --MMS
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Hi guruprasad, The behavior of the QUTest tick() command is illustrated in the QUTest examples (e.g., file qpc|qpcpp\examples\qutest\dpp\test_dpp\test_tick.py). You can see there that tick() is followed by the expectations of event posting and processing: . . . test("tick") glb_filter(GRP_ALL) current_obj(OBJ_TE, "Philo_inst[2].timeEvt") tick() expect(" Tick<0> Ctr=*") expect(" TE0-ADis Obj=Philo_inst[2].timeEvt,AO=Philo_inst[2]") expect("@timestamp TE0-Post Obj=Philo_inst[2].timeEvt,Sig=TIMEOUT_SIG,AO=Philo_inst[2]")...
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Hi Steven, I'm sorry to hear that your installation somehow doesn't work. It's difficult for me to troubleshoot this because I cannot reproduce the problem. I've attached a screenshot from my recent "Stellaris ICDI" add-on installation (see KEIL-5.42-Stellaris.jpg). As you can see, I have KEIL uVision 5.42.0.0 and the debugger is Stellaris ICDI. --MMS
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Hi Steven, I'm not sure how you've installed the "Stellaris ICDI" add-on, but please close your KEIL uVision IDE and then re-open it again (after the installation). The KEIL uVision might be looking for the installed and available debuggers only once upon the startup. --MMS
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Hi Steven, I'm not sure how you've installed the "Stellaris ICDI" add-on, but please close your KEIL uVision IDE and then re-open it again (after the installation). I believe that the KEIL uVision looks for the installed and available debuggers only once upon the startup. --MMS
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Hi, Please see my response to your other inquiry in the discussion thread "Code coverage, including MC/DC, in QP applications". --MMS
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Hi, Please see my response to your other inquiry in the discussion thread "code coverage report for QM project". --MMS
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Hi guruprasad, First, let me clarify that when it comes to code coverage, it really doesn't matter how the code has been generated, manually or automatically by means of the QM modeling tool. Second, code coverage is measured by the instrumentation added during the compilation and linking, so you need a C or C++ compiler that can do this. It turns out that in GNU GCC 14.x the support for code coverage has been significantly improved to include full branch coverage (MC/DC) by means of the -fcondition-coverage...
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Hi Charles, Thank you for your interest in the QSPY sequence diagram generation. Additionally, in the latest code base (v8.1.2), the QSEQ_genTran() function seems to have been removed. I'm not sure what you mean, and I cannot reproduce your problems. The sequence diagram generation feature is tested in every QSPY release, and it works in QSPY 8.1.2. I have attached the sequence diagrams generated by QSPY 8.1.2 from the latest QP/C and QP/C++. Has this feature been permanently removed from the regular...
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Hi Charles, Thank you for your interest in the QSPY sequence diagram generation. Additionally, in the latest code base (v8.1.2), the QSEQ_genTran() function seems to have been removed. I'm not sure what you mean, and I cannot reproduce your problems. The sequence diagram generation feature is tested in every QSPY release, and it works in QSPY 8.1.2. I have attached the sequence diagrams generated by QSPY 8.1.2 from the latest QP/C and QP/C++. Has this feature been permanently removed from the regular...
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Hi Charles, Thank you for your interest in the QSPY sequence diagram generation. Additionally, in the latest code base (v8.1.2), the QSEQ_genTran() function seems to have been removed. I'm not sure what you mean, and I cannot reproduce your problems. The sequence diagram generation feature is tested in every QSPY release, and it works in QSPY 8.1.2. Has this feature been permanently removed from the regular QP edition and only available in special editions (e.g., SafeQP)? No, the function QSEQ_genTran()...
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Hi Lucca, Thank you for the interest in Spexygen. I’d like to ask whether the source of the official QP/C documentation is available... ...particularly the parts related to the Software Requirements Specification (SRS), Software Architecture Specification (SAS), and Software Design Specification (SDS). The documentation of the standard QP and SafeQP editions have been consolidated, and because SafeQP is not open source, the documentation sources are also not published. (Although the documentation...
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Hi Philip, The "Boolean methods" you reference are called "guard conditions" or simply "guards" in the state machine lingo. I've made a dedicated video about "guard conditions": see #36 State Machines Part-2: Guard conditions. I've tried various things in QM but haven't quite nailed this. QM provides a very strong support for guard conditions, which are implemented with a higher-level concept of "choice segments". These "choice segments" can fan-out and nest. They can also have the complementary...
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Hi Philip, The "Boolean methods" you reference are called "guard conditions" or simply "guards" in the state machine lingo. I've made a dedicated video about "guard conditions": see #36 State Machines Part-2: Guard conditions. I've tried various things in QM but haven't quite nailed this. QM provides a very strong support for guard conditions, which are implemented with a higher-level concept of "choice segments". These "choice segments" can fan-out and nest. They can also have the complementary...
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Hi Steve, Thank you for your interest in QPC. The TMS320C28x DSP (a.k.a., C2000) is a real ancient story. It used to be supported in earlier versions of QP, but the support has been dropped due to the non-standard features of the CPU. If you search this forum, there is a recent discussion thread QP and QS to TI C2000 (a.k.a., TMS320C28x or C28x) with some potentially useful information. --MMS
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Hi Steve, Thank you for your interest in QPC. The TMS320C28x DSP (a.k.a., C2000) is a real ancient story. It used to be supported in earlier versions of QP, but the support has been dropped due to the non-standard features of the CPU. If you search this forum, there is a recent discussion thread QP and QS to TI C2000 (a.k.a., C28x) with some potentially useful information. --MMS
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Hi Lucca, Thank you for the interest in Spexygen. I’d like to ask whether the source of the official QP/C documentation is available... ...particularly the parts related to the Software Requirements Specification (SRS), Software Architecture Specification (SAS), and Software Design Specification (SDS). The documentation of the standard QP and SafeQP editions have been consolidated, and because SafeQP is not open source, the documentation sources are also not published. (Although the documentation...
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Hi Lucca, Thank you for the interest in Spexygen. I’d like to ask whether the source of the official QP/C documentation is available... ...particularly the parts related to the Software Requirements Specification (SRS), Software Architecture Specification (SAS), and Software Design Specification (SDS). The documentation of the standard QP and SafeQP editions have been consolidated, and because SafeQP is not open source, the documentation sources are also not published. (Although the documentation...
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Hi Philip, The "Boolean methods" you reference are called "guard conditions" or simply "guards" in the state machine lingo. I've made a dedicated video about "guard conditions": see #36 State Machines Part-2: Guard conditions. I've tried various things in QM but haven't quite nailed this. QM provides a very strong support for guard conditions, which are implemented with a higher-level concept of a "choice segment". These "choice segments" can fan-out and nest. They can also have the complementary...
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Hi Bernardo, As Matthew Eshleman already suggested, you could dedicate one FreeRTOS thread to encapsulate the "blocking everywhere" approach used in FatFs. This should be probably a "naked" FreeRTOS thread, without an AO on top. Such a "naked" thread can produce QP events (by posting or publishing them to AOs). I'm not recommending using an AO for this because it will have to block (or poll), so its queue could overflow, etc. At the same time, I'm not quite sure how to send information to such a...
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Hi Bernardo, As Matthew Eshleman already suggested, you could dedicate one FreeRTOS thread to encapsulate the "blocking everywhere" approach used in FatFs. This should be probably a "naked" FreeRTOS thread, without an AO on top. Such a "naked" thread can produce QP events (by posting or publishing them to AOs). I'm not recommending using an AO for this because it will have to block (or poll), so its queue could overflow, etc. At the same time, I'm not quite sure how to send information to such a...
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Hi Charles, The two-pointer feature in QMPool I mentioned in my previous post works differently than you presume. Specifically, the second pointer is used only as the redundant "Duplicate Storage" and not for linking the free blocks. Then in qf_mem.c file, you can see invariants that exploit this redundancy (invariants 342 and 422). A good question is why the Duplicate Storage is not inverted, as usual? There are two reasons for that: First, it is desirable to distinguish between a free block and...
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QTimeEvt_noActive() behaves incorrectly in QP/C/C++ 8.1.0
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QTimeEvt_noActive() behaves incorrectly in QP/C/C++ 8.1.0
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Hi Charles, The two-pointer feature in QMPool I mentioned in my previous post works differently than you presume. Specifically, the second pointer is used only as the redundant "Duplicate Storage" and not for linking the free blocks. Then in qf_mem.c file, you can see invariants that exploit this redundancy (invariants 342 and 422). A good question is why the Duplicate Storage is not inverted, as usual? There are two reasons for that: First, it is desirable to distinguish between a free block and...
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Hi Charles, The two-pointer feature in QMPool I mentioned in my previous post works differently than you presume. Specifically, the second pointer is used only as the redundant "Duplicate Storage" and not for linking the free blocks. Then in qf_mem.c file, you can see invariants that exploit this redundancy (invariants 342 and 422). A good question is why the Duplicate Storage is not inverted, as usual? Well, it was inverted initially, but some users reported problems on MSP430 CPU (which is still...
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Hi Charles, The two-pointer feature in QMPool I mentioned in my previous post works differently than you presume. Specifically, the second pointer is used only as the redundant "Duplicate Storage" and not for linking the free blocks. Then in qf_mem.c file, you can see invariants that exploit this redundancy (invariants 342 and 422). A good question is why the Duplicate Storage is not inverted, as usual? Well, it was inverted initially, but some users reported problems on MSP430 CPU (which is still...
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Hi Charles, The two-pointer feature in QMPool I mentioned in my previous post works differently than you presume. Specifically, the second pointer is used only as the redundant "Duplicate Storage" and not for linking the free blocks. Then in qf_mem.c file, you can see invariants that exploit this redundancy (invariants 342 and 422). The good question is why the Duplicate Storage is not inverted, as usual? Well, it was inverted initially, but some users reported problems on MSP430 CPU (which is still...
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Hi Charles, I'm glad that you took a detailed look into the QP 8.1.1 code. As you correctly concluded, the private QEvt.filler_ data member is not actually used anywhere in the code. However, it has been introduced for the following reasons: to void subtle semantic differences between the regular QP and SafeQP editions (this reason is given in the QP/C and QP/C++ online documentation); to make the minimum QEvt size equivalent to 2 pointers (at least on 32-bit CPUs); to avoid subtle semantic differences...
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Hi Charles, I'm glad that you took a detailed look into the QP 8.1.1 code. As you correctly concluded, the private QEvt.filler_ data member is not actually used anywhere in the code. However, it has been introduced for the following reasons: to void subtle semantic differences between the regular QP and SafeQP editions (this reason is given in the QP/C and QP/C++ online documentation); to make the minimum QEvt size equivalent to 2 pointers (at least on 32-bit CPUs); to avoid subtle semantic differences...
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Hi Charles, I'm glad that you took a detailed look into the QP 8.1.1 code. As you correctly concluded, the private QEvt.filler_ data member is not actually used anywhere in the code. However, it has been introduced for two reasons: - to void subtle semantic differences between the regular QP and SafeQP editions (this reason is given in the QP/C and QP/C++ online documentation); - to make the minimum QEvt size equivalent to 2 pointers (at least on 32-bit CPUs); - to avoid subtle semantic differences...
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Hi Andrew, I'm glad to hear that you ported QP/C to rt-thread, but from my experience there are always some little details that might be incorrect even though "the basic AO functions run well". For example, here is a short list of questions to check: are you sure that you correctly use the critical section from rt-thread? are you using the correct event queue mechanism for the AOs? are you correctly translating the AO priority numbering scheme from QP to rt-thread when you start the AO (and create...
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Hi Andrew, I'm glad to hear that you ported QP/C to rt-thread, but from my experience there are always some little details that might be incorrect even though "the basic AO functions run well". For example, here is a short list of questions to check: are you sure that you correctly use the critical section from rt-thread? are you using the correct event queue mechanism for the AOs? are you correctly translating the AO priority numbering scheme from QP to rt-thread when you start the AO (and create...
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Hi Lucca, I've not used NASA's FRET in any real project and know only what I could read online. But from this, the FRET tool seems to be focused on formalizing the requirement specification by "restricting" natural language to make it more unambiguous, which reminds me of another tool called StrictDoc (see https://github.com/strictdoc-project/strictdoc ). The goals of Spexygen are different. Spexygen does not "restrict" your language, although it certainly enforces consistency of specifications....
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Hi Lucca, I've not used NASA's FRET in any real project and know only what I could read online. But from this, the FRET tool seems to be focused on formalizing the requirement specification by "restricting" natural language to make it more unambiguous, which reminds me of another tool called StrictDoc (see https://github.com/strictdoc-project/strictdoc ). The goals of Spexygen are different. Spexygen does not "restrict" your language. Instead, Spexygen centers on one thing and one thing only: traceability,...
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Hi Andrew, Yes, the directive $declare {VMod} generates the whole class VMod, which includes all class members: both data members and member functions. State-handler functions are member functions (they need the me instance pointer), so they are included. This is exactly as in C++, where a valid class declaration requires all members. But your problem is really not about the class declaration, but about encapsulation and information hiding. It seems to me that you're trying to go about it in the...
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Hi Alex, As you can see in the supplied integration tests (directory qpcpp\examples\qutest\integration_tests) , they all use test-script commands like test, glb_filter, command, and expect. Here is a snippet from qpcpp\examples\qutest\integration_tests\test_qk\test_mpu.py: # preamble def on_reset(): expect_pause() # don't call continue_test() def on_setup(): glb_filter(GRP_SC, GRP_UA) MEM_START = 0 MEM_END = 1 # NULL-pointer dereferencing... test(''' NULL-read -> ASSERT ''') command("MEM_READ", 0x0,...
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Hi Ramon, Thank you for the update. Your code could be helpful to other users of the C2000. The changes should apply to the newer QP 8.x. --MMS
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Thank you for the update. Your code could be helpful for other users of the C2000. The changes should be applicable to the newer QP 8.x. --MMS
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Hi alpu4, As I described earlier, integration tests are different than unit tests. The QS_TEST_PAUSE() macro is part of the QUTest "QP Stub", which supports unit testing, but is specifically not used during integration testing. In integration testing, you use the real kernel, so "QP Stub" is not available. At this stage, you should have already tested the startup sequence and state machine initialization, so there should be no need for QS_TEST_PAUSE(). A good way of thinking about it is that the...
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Hi Ramon, The QS_onFlush() callback is entirely under your control, so you can do whatever you deem right in your specific application. If the physical QS output channel (CAN in your case) is not even connected, then most likely the missing QS dictionaries won't make a difference, would they? So, yes, in that case you could implement QS_onFlush() so that it gives up and returns after certain number of attempts. The consequences of not flushing the whole QS trace buffer are that you might overwrite...
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Hi alpu4, I'm glad to hear that you were able to use the QUTest harness on real target hardware. That's a very good first step. But at this point, you need to decide what kind of testing you wish to perform. From your description, it seems that you have real interrupts, real peripheral (SPI), etc. To me this looks awfully like integration testing, not unit testing (where you would use the "QP Stub" included in QUTest). The good news is that QUTest is universal and can be used for integration testing....
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Hi Harry, You can subclass QP::QTimeEvt and add to it more attributes. However, I don't see how the framework could modify such attributes when the time event is posted. I would just subclass QTimeEvt, add to it a unit8_t ID attribute. The constructor of such time-events could set the ID for each instance and then don't mess with it. Every time such time event shows up in the queue, you look at its ID attribute and dispatch it to the right passive HSM component. (If I remember correctly, all this...
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Hi builder, I'm glad to hear that the newer STM32Cube was able to build the project successfully. The errors you saw earlier ("selected processor does not support mrs r0,PRIMASK in Thumb mode") suggests that the STM32Cube selected the wrong CPU type (seems like the obsolete ARM7TDMI or something, which had an earlier Thumb mode). --MMS
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Hi builder, I'm glad to hear that the newer STM32Cube was able to build the project successfully. The errors you saw in the earlier ("selected processor does not support mrs r0,PRIMASK in Thumb mode") suggests that the STM32Cube selected the wrong CPU type (seems like the obsolete ARM7TDMI or something, which had an earlier Thumb mode). --MMS
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