Cedric P

Thanks for the lightning fast reply !

My bad, found the answer from Philipp Klaus Krause in 2018 here

Hi, I'm currently using SDCC to discover the STM8 MCU and came across something peculiar. I'm following the STM8S003 silicon errata from the vendor, section 2.1.3 that specifies a workaround for ISRs executed with the 'main' (lowest) priority. In order to do so, I added an __asm__("sim"); at the beginning of my ISR. When looking at the .asm file produced by SDCC I noticed it injected a division by 0 in the preamble: _uart1_rx_isr: clr a div x, a ; src/serial.c: 130: sim(); sim This is no big deal...