Miroslav

I read about changing the code. There are no problems with this. Now I'm more concerned about setting parameters (CLOCK(24000000) MODC2 PMW DPC BSE MDU_R515, etc.). I'm still looking for documentation on this. UPD: Do I understand correctly that setting the processor frequency is needed only for debugging? Other directives (MODC2 PMW DPC BSE MDU_R515) are also not needed in SDCC?

Unfortunately, I did not immediately notice the main page https://sdcc.sourceforge.net/ and the documentation that is there. I ported (described the registers) for this unusual (for me) 8051 T5 controller. However, the generated file does not run on my debug board. I would be grateful if you help me. This is just a sketch, so the code is not pretty https://www.sendspace.com/file/nvetts It works in Keil C51 UV5. I think it's in the compiler settings. Keil has the following settings: Memory Model Large...

Unfortunately, I did not immediately notice the main page https://sdcc.sourceforge.net/ and the documentation that is there. I ported (described the registers) for this unusual (for me) 8051 T5 controller. However, the generated file does not run on my debug board. I would be grateful if you help me. This is just a sketch, so the code is not pretty https://www.sendspace.com/file/nvetts It works in Keil C51 UV5. I think it's in the compiler settings. Keil has the following settings: Memory Model Large...

Unfortunately, I did not immediately notice the main page https://sdcc.sourceforge.net/ and the documentation that is there. I ported (described the registers) for this unusual (for me) 8051 T5 controller. However, the generated file does not run on my debug board. I would be grateful if you help me. This is just a sketch, so the code is not pretty https://www.sendspace.com/file/nvetts It works in Keil C51 UV5. I think it's in the compiler settings. Keil has the following settings: Memory Model Large...

When compiling in Keil UV5, this construct from compiler.h does not work: #elif defined __CX51__ We need to add an additional macro definition: #elif defined __CX51__ || defined __C51__ This works in UV5. Perhaps that would be even better? #elif defined __CX51__ || defined __C51__ || defined __A51__ || defined __AX51__

I read about changing the code. There are no problems with this. Now I'm more concerned about setting parameters (CLOCK(24000000) MODC2 PMW DPC BSE MDU_R515, etc.). I'm still looking for documentation on this.

I read about changing the code. There are no problems with this. Now I'm more concerned about setting parameters (CLOCK(24000000) MODC2 PMW DPC BSE MDU_R515, etc.). I'm still looking for documentation on this.

Thanks for the answer. I studied the source code of the configuration file (.CDB). It looks like a regular 8051 All I need is transfer these parameters to SDCC ? CPU=IRAM(0-0xFF) CLOCK(24000000) MODC2 PMW DPC BSE MDU_R515 MON=S8051.DLL TCore51.DLL("-pR8051XC") REGFILE=M5.h("DWIN") SFILE="LIB\STARTUP_M5.A51" ("M5 Startup Code") SIM=S8051.DLL DCore51.DLL("-pR8051XC")