That seems to fix it. Thx a lot.
Timestep too small for pwl with 3 resistors and DC power source
Sorry, this is expected actually, the correct indent call is the one mentioned above and it works as expected
Another example: - c: cv d: e yaml.indent(mapping=2, sequence=2, offset=2) results in - c: cv d: e
build: fix generating ltmain.sh during bootstrap
build: fix generating ltmain.sh during bootstrap
build: fix bootstrap for new libtoolize
fix call of libtoolize during bootstrap