Activity for DF4IAH

  • DF4IAH DF4IAH committed [bad8d1] on Code

    3D - plate for hotglue added

  • DF4IAH DF4IAH committed [4232a8] on Code

    The KRYON of Magnetic Service - fixed

  • DF4IAH DF4IAH committed [25c0a4] on Code

    3D - tool for crafting coils added (3)

  • DF4IAH DF4IAH committed [ba32b5] on Code

    3D - tool for crafting coils added (2)

  • DF4IAH DF4IAH committed [78eab0] on Code

    2.1.6 - RM72x32x15 added

  • DF4IAH DF4IAH committed [03d237] on Code

    3D - tool for crafting coils added

  • DF4IAH DF4IAH committed [f81300] on Code

    3D - mods due to filament change to PLA+

  • DF4IAH DF4IAH committed [c004ef] on Code

    3D - fixed sizes for other magnet type

  • DF4IAH DF4IAH committed [3c7a0e] on Code

    3D - new experiment plate added

  • DF4IAH DF4IAH committed [137ad7] on Code

    3D - update to FreeCAD 1.0

  • DF4IAH DF4IAH committed [bfd242] on Code

    fpga - system/analyze - LO 125 MHz ready, IF clock to be checked (1a)

  • DF4IAH DF4IAH committed [cf7e03] on Code

    fpga - system/analyze - LO 125 MHz ready, IF clock to be checked

  • DF4IAH DF4IAH committed [c475ba] on Code

    fpga - system/analyze - new LO and IF clock pulses for target receive frequency

  • DF4IAH DF4IAH committed [ca7640] on Code

    HW - initial directory setup

  • DF4IAH DF4IAH committed [287147] on Code

    tof_www_apps - I/Q Analyzer - 2_Analyze-Ramp__Claude-Sonnet-4.py multiple strange errors remain

  • DF4IAH DF4IAH committed [45dcdb] on Code

    tof_www_apps - I/Q Analyzer - 1_Analyze-Ramp__ChatGPT-4o.py works

  • DF4IAH DF4IAH committed [d37864] on Code

    fpga - system - wrong CORDIC connection fixed

  • DF4IAH DF4IAH committed [155578] on Code

    fpga - system - AXI SmartInterconnect for LITE and DMA used again (1a)

  • DF4IAH DF4IAH committed [42d946] on Code

    tof_www_apps - GPS data dropouts fixed - changed to 38400 Baud

  • DF4IAH DF4IAH committed [a9898e] on Code

    tof_www_apps - startup problem with gdb fixed - Makefiles -O3 added

  • DF4IAH DF4IAH committed [77f37e] on Code

    fpga - system - AXI SmartInterconnect for LITE and DMA used again

  • DF4IAH DF4IAH committed [07c900] on Code

    fpga - system - DMA added again (1a)

  • DF4IAH DF4IAH committed [cd9a69] on Code

    fpga - system - DMA added again

  • DF4IAH DF4IAH committed [05a958] on Code

    fpga - revert to 20250521b_42fc6244 but use latest analyze - booting GOOD

  • DF4IAH DF4IAH committed [18ab72] on Code

    fpga - system - replace new AXI smartconnect by old but working AXI Interconnect - DMA also

  • DF4IAH DF4IAH committed [1b8dfa] on Code

    fpga - system - replace new AXI smartconnect by old but working AXI Interconnect (1a)

  • DF4IAH DF4IAH committed [0320f8] on Code

    fpga - system - replace new AXI smartconnect by old but working AXI Interconnect

  • DF4IAH DF4IAH committed [2b81d1] on Code

    fpga - analyze - CORDIC modified (2)

  • DF4IAH DF4IAH committed [146f4f] on Code

    fpga - analyze - CORDIC modified

  • DF4IAH DF4IAH committed [fe95d6] on Code

    fpga - analyze - DDS to 10MHz and no DAC anymore (4a)

  • DF4IAH DF4IAH committed [bbf2e6] on Code

    fpga - analyze - DDS to 10MHz and no DAC anymore (4)

  • DF4IAH DF4IAH committed [2b75a8] on Code

    fpga - analyze - DDS to 10MHz and no DAC anymore (3)

  • DF4IAH DF4IAH committed [70e0a2] on Code

    fpga - analyze - DDS to 10MHz and no DAC anymore (2)

  • DF4IAH DF4IAH committed [be521a] on Code

    fpga - analyze - DDS to 10MHz and no DAC anymore

  • DF4IAH DF4IAH committed [696e2f] on Code

    fpga - analyze - DAC2 output removed

  • DF4IAH DF4IAH committed [ead451] on Code

    Merge branch 'main' of ssh://git.code.sf.net/p/redpitaya-tof/code into main

  • DF4IAH DF4IAH committed [20ad55] on Code

    fpga - analyze - 62.5 MHz sync reduced to 100 us

  • DF4IAH DF4IAH committed [c48cde] on Code

    fpga - analyze - 62.5 MHz sync reduced to 100 us (2)

  • DF4IAH DF4IAH committed [44af6f] on Code

    fpga - analyze - 62.5 MHz sync reduced to 1 ms

  • DF4IAH DF4IAH committed [fdda51] on Code

    fpga - analyze - FIFO FSM decimation by 2

  • DF4IAH DF4IAH committed [2b4667] on Code

    tof_www_apps - FIFO buffer 2.000Mps - auto-adjusting sync point (2)

  • DF4IAH DF4IAH committed [7f2f23] on Code

    tof_www_apps - FIFO buffer - auto-adjusting sync point

  • DF4IAH DF4IAH committed [c56540] on Code

    fpga - system - AXI interfacing enhanced

  • DF4IAH DF4IAH committed [bfdd8e] on Code

    tof_www_apps - com_ubx.c - GPS buffering fixed

  • DF4IAH DF4IAH committed [318682] on Code

    of_www_apps - ToF_IQdata - DMA - reducing buffers

  • DF4IAH DF4IAH committed [68d2f3] on Code

    fpga - FSM Ramp - once a second only

  • DF4IAH DF4IAH committed [4aee76] on Code

    Merge branch 'main' of ssh://git.code.sf.net/p/redpitaya-tof/code

  • DF4IAH DF4IAH committed [f44576] on Code

    tof_www_apps - segfault somewhere around ub_receive() ?

  • DF4IAH DF4IAH committed [db00e4] on Code

    fpga - FSM Ramp - step values delay extended

  • DF4IAH DF4IAH committed [6283cc] on Code

    fpga - FSM Ramp - step values okay (1c)

  • DF4IAH DF4IAH committed [2b59b6] on Code

    fpga - FSM Ramp - step values okay (1b)

  • DF4IAH DF4IAH committed [19a65c] on Code

    fpga - FSM Ramp - step values okay (1a)

  • DF4IAH DF4IAH committed [b48bcf] on Code

    fpga - FSM Ramp - fixed (1a)

  • DF4IAH DF4IAH committed [b1b4cf] on Code

    fpga - FSM Ramp - fixed

  • DF4IAH DF4IAH committed [5cf722] on Code

    fpga - AXI SmartConnect DMA - upgrade (5a)

  • DF4IAH DF4IAH committed [d982cd] on Code

    fpga - AXI SmartConnect DMA - upgrade (5)

  • DF4IAH DF4IAH committed [5fb86a] on Code

    fpga - AXI SmartConnect DMA - upgrade (4a)

  • DF4IAH DF4IAH committed [17124e] on Code

    fpga - AXI SmartConnect DMA - upgrade (4)

  • DF4IAH DF4IAH committed [ac1d08] on Code

    fpga - AXI SmartConnect DMA - upgrade (3)

  • DF4IAH DF4IAH committed [aaff9a] on Code

    Merge branch 'main' of ssh://git.code.sf.net/p/redpitaya-tof/code into main

  • DF4IAH DF4IAH committed [041548] on Code

    fpga - AXI SmartConnect DMA - upgrade (2)

  • DF4IAH DF4IAH committed [f016ab] on Code

    fpga - AXI SmartConnect DMA - upgrade

  • DF4IAH DF4IAH committed [bb1663] on Code

    fpga - FSM ramp enhanced (2)

  • DF4IAH DF4IAH committed [5a2c18] on Code

    fpga - AXI DMA added - settings added (2)

  • DF4IAH DF4IAH committed [b3f474] on Code

    fpga - FSM ramp enhanced

  • DF4IAH DF4IAH committed [11b21f] on Code

    tof_www_apps - ToF_IQdata - DMA - timing info added

  • DF4IAH DF4IAH committed [c9e6f8] on Code

    fpga - AXI DMA added - settings added

  • DF4IAH DF4IAH committed [88082c] on Code

    fpga - AXI DMA added (2)

  • DF4IAH DF4IAH committed [56a719] on Code

    tof_www_apps - ToF_IQdata - DMA - round trip works

  • DF4IAH DF4IAH committed [f4fd11] on Code

    tof_www_apps - ToF_IQdata - DMA - single shot works

  • DF4IAH DF4IAH committed [4aca62] on Code

    tof_www_apps - ToF_IQdata - DMA engine needs physical DDR, not virtual address

  • DF4IAH DF4IAH committed [74d00f] on Code

    fpga - AXI DMA added - chain buffers and I/Q buffers set

  • DF4IAH DF4IAH committed [5497de] on Code

    fpga - AXI DMA added - more modifications done

  • DF4IAH DF4IAH committed [cc88e2] on Code

    fpga - AXI DMA added - first modifications done

  • DF4IAH DF4IAH committed [753897] on Code

    fpga - AXI DMA added (2)

  • DF4IAH DF4IAH committed [2a4ab1] on Code

    fpga - AXI DMA added

  • DF4IAH DF4IAH committed [b45d0a] on Code

    tof_www_apps - ToF_App - step limits try

  • DF4IAH DF4IAH committed [ad7026] on Code

    fpga - analyze - fsm_ramp_fifo fixed

  • DF4IAH DF4IAH committed [a5618d] on Code

    tof_www_apps - ToF_App - initial FIFO packets received

  • DF4IAH DF4IAH committed [8b6ebe] on Code

    fpga - analyze - fsm_ramp_fifo and GPIOx assignments modified (2)

  • DF4IAH DF4IAH committed [60b86d] on Code

    fpga - analyze - fsm_ramp_fifo and GPIOx assignments modified

  • DF4IAH DF4IAH committed [8cbe73] on Code

    fpga - DAC waveforms added (3)

  • DF4IAH DF4IAH committed [a95c04] on Code

    tof_www_apps - ToF_App - additional instruments added

  • DF4IAH DF4IAH committed [6bec99] on Code

    fpga - analyze - CORDIC output width from 10 to 11 bits changed (2)

  • DF4IAH DF4IAH committed [88657c] on Code

    fpga - analyze - CORDIC output width from 10 to 11 bits changed

  • DF4IAH DF4IAH committed [c898bc] on Code

    tof_www_apps - ToF_App - modifications for phase analyzer

  • DF4IAH DF4IAH committed [37f4cb] on Code

    fpga - analyze - time32 FSM added (2)

  • DF4IAH DF4IAH committed [d3a3ce] on Code

    fpga - analyze - time32 FSM added

  • DF4IAH DF4IAH committed [e1ca8d] on Code

    fpga - analyze ramp - new FSM added (2)

  • DF4IAH DF4IAH committed [6431f4] on Code

    fpga - analyze ramp - new FSM added

  • DF4IAH DF4IAH committed [9c7ed1] on Code

    fpga - docs added

  • DF4IAH DF4IAH committed [29e004] on Code

    fpga - DAC waveforms added (2)

  • DF4IAH DF4IAH committed [73e80b] on Code

    fpga - DAC waveforms added

  • DF4IAH DF4IAH committed [89abc0] on Code

    fpga - adjusted amplitude of 15.625 MHz output to 750 mVpp

  • DF4IAH DF4IAH committed [6ad547] on Code

    fpga - FSM_FIFO-CORDIC - Simulations added

  • DF4IAH DF4IAH committed [949b2f] on Code

    fpga - FSM fifo/cordic - TUSER for timing of next planned FSM added

  • DF4IAH DF4IAH committed [ba985e] on Code

    tof_www_apps - ToF_App - AXI4Stream-FIFO works (2)

  • DF4IAH DF4IAH committed [1c1ef5] on Code

    fpga - FSM fifo/cordic and DDS1024 - fixed

  • DF4IAH DF4IAH committed [e7abdc] on Code

    fpga - removing RedPitaya no more needed stuff (2)

  • DF4IAH DF4IAH committed [3196e1] on Code

    fpga - removing RedPitaya no more needed stuff

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