Samples (combsample.d64) from lots of chips from Trurl: Hi! Here are the new results for my chips, organized in directories this time. Trurl
'broken r4ar 3789.dat.txt' and 'cbm 4383.dat.txt' are almost identical to the chip I tested. 'broken r4ar 3488.dat.txt' is closest to (slightly weaker than) Andreas Boose's 6581 0683. 'broken 0384.dat.txt' seems to have extremely strong samples. I guess the r4ar 3488 would be the best replacement in reSID.
Good point! Here is an updated sampling program for all combined waveforms (takes forever to run, unfortunately). https://github.com/daglem/reDIP-SID/blob/master/research/combsample.a65 https://github.com/daglem/reDIP-SID/blob/master/research/combsample.d64
You'll have to sort this out without me :) All of this has been tweaked considerably since I last worked on it, so I can't comment on it. I can however say that there is no such thing as a "correct" DC level - this varies considerably between chips, at least for the 6581. But maybe you can get closer to some kind of average?
Use the new fast noise LFSR reset by Dag Lem to improve the tests
Use new fast noise LFSR reset, patch by Leandro Nini (see bug #1885)
I have tested the patch on a C64, and there is still a minor issue - badlines disrupt the timing of the LFSR clocking in noisewriteback/noise_writeback_check.asm and wb_testsuite/noise_writeback_check.asm Changing the start of both files to the following fixes the issue: ; disallow interrupts and disable screen to get stable timing sei lda #0 sta $d011 sta $d015 raslo: bit $d011 bpl raslo rashi: bit $d011 bmi rashi I haven't tested wf12nsr.asm, but I think it should be changed like this: ; disallow...
Even though the result is the same, I think I would still set the frequency immediately before releasing the test bit in wb_testsuite/noise_writeback_check.asm, so that one isn't fooled into thinking that the setting before the noise reset makes any difference. Other than this nitpick, this looks good to me :-)