chenster

Thanks for your replay, Luca. Probably I misundertand the control pins. I thought RTS (require to send, low active) is a output signal of camera and CTS(clear to send. low active) is a input signal for camera. So I just float the RTS and pull down the CTS, which tells camera the FPGA is always ready to receive data. Today I have also found something intresting. Because the communication between PC and camera is fine, so I test the pin voltage of UART. After setting the baudrate, I use echo 'E+' >...

Hello, my task is to connect the DVS camera with a FPGA and let the FPGA activate the camera and then receive the streaming data from the camera. As the first step I've established the communication between camera and a linux PC. Everything is fine. For the FPGA test, I use a 5V power source to provide the power for camera and use the UART0 interface to connect with my FPGA. The problem I met is when the FPGA sends the activation command "E+\n" via RXD to the camera. There is no response on TXD....