Thanks Miro I do not believe that I have done a good job explaining what I’m doing. I also believe that I need more state machine education. I will spend some more time reviewing my code, rereading your app notes and watching your training videos. I hope to return to this in the future with some concrete logic analyzer traces that will help me describe what I’m doing. In any case thanks to everyone who had input. It’s appreciated. Jim
Hi Miro I started with a single AO but found that because the actual hardware DMA transfer with the SPI was not part of the run to completion step the system would almost always start the next transfer before the current transfer was complete thus destroying it. Also, even at 5mhz the SPI is by far the slowest part of the communication process and it was not being fully utilized. So, I put it into a separate AO with higher priority and that seemed to have helped that issue. Now when the current RTC...
Hi Panoption I have been working on something like this. In my original post I had combined the many different events into 10 event types so I only needed 10 different defer queues and this has drastically increased the spaghetti code to make this happen. It has become a huge cluster. All that is needed is for the framework to provide a pause function so the the AO can still queue events as they come but not process any of then until the SPI hardware has completed its current DMA transfer and un-pauses....
The SPI AO would pause on entry and un-pause in the transfer complete interrupt. The pause functions would be simple function calls into the framework with no events involved.
Hello In my current STM32F407 design I have a Master Hub communicating with 6 Slave Endpoints via SPI. The Hub has 2 AOs. One to handle the upper level of interface with the 6 Endpoints (I’ll call this Hub AO) and another to handle the lower level SPI via DMA and interrupts (I’ll call this Spi AO). The Spi AO is higher priority than the Hub AO and handles SPI transfers consisting of 10 to 180 bytes. The Hub AO posts many different events to the Spi AO with all of the information needed for the Spi...
Thank You Miro This has both greatly helped me see the bigger picture and also feel much more confident about the QP messaging structure. I really wish I had had something like this earlier when I was just starting with the framework. For me, I am a very literal person and that sometimes gets me messed up as I learn from multiple sources. There’s often just enough discrepancy in terminology from the different sources to make me question if I have it right. I have updated my matrix. Blatantly coping...
Thanks Harry You have confirmed some of what I think I know. I have attached an image showing what I believe is the correct use of events under each condition. Is my little spreadsheet complete? Have I missed anything? Is there more to add? Are there edge cases. Also your comment of an Active Object having more than 1 state machine is something that I have never considered. How would something like that play into this? I read the app note regarding orthogonal regions and confess that I didn't understand...
Hello Everyone I have spent a great deal of time studying the QP framework, watching every video available, reading every application note and going through the examples. I have learned a lot. Thank you, Miro, for creating such an awesome product and for proving it to others. Me in this case. 😊 I have a working 100% register-based application using the STM32F407. The application uses DMA and interrupts exclusively for ALL hardware communication and control. 0% blocking. Other than the QP framework...