Activity for akaseo
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akaseo posted a comment on discussion Open Discussion
There is support for that: cpu: count=1:1:1 # sockets:cpus:threads
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Ok, I make some other tests. As we can see below, I tried to catch not empty register. but the jump instruction was omitted, so EDX is ZERO, and Bochs shows something diffrent... I think that the error is somewhere in the debugger, the EDX register is zeroed but the debugger considers it is set and trying to processes it as that. I'm jumping especially to ecx to be sure that xor will be made in the next step... On the Qemu with radare2 debugger, this situation never occured! If someone can tell me...
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Ok, I make some other tests. As we can see below, I tried to catch not empty register. but the jump instruction was omitted, so EDX is ZERO, and Bochs shows something diffrent... I think that the error is somewhere in the debugger, the EDX register is zeroed but the debugger considers it is set and trying to processes it as that. I'm jumping especially to ecx to be sure that xor will be made in the next step... On the Qemu with radare2 debugger, this situation never occured! If someone can tell me...
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Ok, I make some other tests. As we can see below, I tried to catch not empty register. but the jump instruction was omitted, so EDX is ZERO, and Bochs shows something diffrent... I think that the error is somewhere in the debugger, the EDX register is zeroed but the debugger considers it is set and trying to processes it as that. I'm jumping especially to ecx to be sure that xor will be made in the next step... On the Qemu with radare2 debugger, this situation never occured!
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Ok, I make some other tests. As we can see below, I tried to catch not empty register. but the jump instruction was omitted, so EDX is ZERO, and Bochs shows something diffrent... I think that the error is somewhere in the debugger, the EDX register is zeroed but the debugger considers it is set and trying to processes it as that. I'm jumping especially to ecx to be sure that xor will be made in the next step...
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Ok, I make some other tests. As we can see below, I tried to catch not empty register. but the jump instruction was ommited, so EDX is ZERO, and Bochs shows something diffrent... I think that the error is somewhere in the debugger, the EDX register is zeroed but the debugger considers it is set and trying to processes it as that. I'm jumping especially to ecx to be sure that xor will be made in the next step...
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Ok, I make some other tests. As we can see below, I tried to catch not empty register. but the jump instruction was ommited, so EDX is ZERO, and Bochs shows something diffrent... I think that the error is somewhere in the debugger, the EDX register is zeroed but the debugger considers it is set and trying to processes it as that.
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OK. preparations done. I uploaded for You disk image, just put it inside Bochs: ata0-master: type=disk, path="disk.raw", mode=flat, cylinders=1, heads=1, spt=1, model="Generic 1234", very important, enable magic_break magic_break: enabled=1 Now run the code "continue", move a mouse in few ways, and the exception will occur and halt the code execution beacuse magic break will stop it. I made every exception handlers just to show me the number of exception itself (in AL register) and then return to...
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OK. preparations done. I uploaded for You disk image, just put it inside Bochs: ata0-master: type=disk, path="disk.raw", mode=flat, cylinders=1, heads=1, spt=1, model="Generic 1234", very important, enable magic_break magic_break: enabled=1 Now run the code "continue", move a mouse in few ways, and the exception will occur and halt the code execution beacuse magic break will stop it. I made every exception handlers just to show me the number of exception itself (in AL register) and then return to...
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OK. preparations done. I uploaded for You disk image, just put it inside Bochs: ata0-master: type=disk, path="disk.raw", mode=flat, cylinders=1, heads=1, spt=1, model="Generic 1234", very important, enable magic_break magic_break: enabled=1 Now run the code "continue", move a mouse in few ways, and the exception will occur and halt the code execution beacuse magic break will stop it. I made every exception handlers just to show me the number of exception itself (in AL register) and then return to...
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OK, let me prepare environment for debugging, and answer all your questions. (but it might take a time, plese be patient).
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It's trully my own code, from my operating system. BTW: this code is running fine on Qemu.... but nvm. Below is the part of code which make a rufus just a simple color mixer based on alpha: ;======================================================================= ; in: ; rsi - source color ; rdi - destination color ; out: ; eax - mixed value library_color_alpha: ; preserve push rbx push rcx push rdx ; local variable push 0 ; weight (alpha channel) movzx ebx, byte [rsi + 0x03] ; invert alpha channel...
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It's trully my own code, from my operating system. Below is the part of code which make a rufus just a simple color mixer based on alpha: ;======================================================================= ; in: ; rsi - source color ; rdi - destination color ; out: ; eax - mixed value library_color_alpha: ; preserve push rbx push rcx push rdx ; local variable push 0 ; weight (alpha channel) movzx ebx, byte [rsi + 0x03] ; invert alpha channel not bl inc bl ; red -------------------------------------------------------------...
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It's trully my own code, from my operating system. Below is the part of code who make a rufus just a simple color mixer based on alpha: ;======================================================================= ; in: ; rsi - source color ; rdi - destination color ; out: ; eax - mixed value library_color_alpha: ; preserve push rbx push rcx push rdx ; local variable push 0 ; weight (alpha channel) movzx ebx, byte [rsi + 0x03] ; invert alpha channel not bl inc bl ; red -------------------------------------------------------------...
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It's trully my own code, from my operating system. Below is the part of code who make a rufus just a simple color mixer based on alpha: ;======================================================================= ; in: ; rsi - source color ; rdi - destination color ; out: ; eax - mixed value library_color_alpha: ; preserve push rbx push rcx push rdx ; local variable push 0 ; weight (alpha channel) movzx ebx, byte [rsi + 0x03] ; invert alpha channel not bl inc bl ; red -------------------------------------------------------------...
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I got GPF when CPU tried to execute division, so I forced Bochs to return to code and let me see. And this is a state of registers before exception.
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Built from SVN snapshot on April 9, 2017 Compiled on Jan 11 2019 at 07:51:24 Can someone explain to me why: xor edx, edx Didn't clear the register?
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Hey! Every created "hidden" volume protected by this password: VgW_SJ?7=_Kg<mJ|LGl?}Xt!v&FE!eDN can't be opened anymore.... VeraCrypt 1.23-Hotfix-2 64bit Volume (file) is on software raid1 created (2 hard drives, NTFS) and managed by Windows 10 1809 Volume filesystem exFAT (outer and hidden)
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Hey! Every created "hidden" volume protected by this password: VgW_SJ?7=_Kg<mJ|LGl?}Xt!v&FE!eDN can't be opened anymore.... VeraCrypt 1.23-Hotfix-2 64bit Volume (file) is on software raid1 created and managed by Windows 10 1809
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Hey! Every created "hidden" volume protected by this password: VgW_SJ?7=_Kg<mJ|LGl?}Xt!v&FE!eDN can't be opened anymore.... VeraCrypt 1.23-Hotfix-2 64bit
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