afaik

Hello, someone has some suggestions? I took the xilinx microbalze project and I modified the openMAC to use MII instead of RMII, with only 1 PHY. The latency is atround 300 us with about 30 us of jitter thank you!

Hello, I ported the microblaize ise demo to another platform (virtex). The demo use one microblaze to run both userspace and kernel powerlink stack. I measured the latency with Wireshark, about 300 us of Preq-Pres latency. Is it OK? Seems huge for an embedded demo Thank you!

Hello, I don't understand why the embedded Microblaize demo cn_single_gpio require two PHY. What is the purpouse of the additional one? Is it mandatory for the demo? Thanks

Hello, I have to port Powerlink on very limited embedded system (about 64 kBytes for RAM) without OS (bare metal), but only the CN. I compiled the Microblaze implementation with the complete Powerlink stack (CN demo) to have an idea of the size of Powerlink. Well, I got 220kB of BSS, which is too much. After an analysis of the memory map, I found 50kB of memory stack and 140kB of heap space reserved. How much of that it is really used? Thanks

Hello, I have to port Powerlink on very limited embedded system (about 64 kBytes for RAM) without OS (bare metal), but only the CN. I compiled the Microblaze implementation with the complete stack (CN demo) to have an idea of the size of the stack. Well, I got 220kB of BSS, which is too much. After an analysis of the memory map, I found 50kB of stack and 140kB of heap space reserved. How much of that it is really used? Thanks