2 Integrations with SystemC
View a list of SystemC integrations and software that integrates with SystemC below. Compare the best SystemC integrations as well as features, ratings, user reviews, and pricing of software that integrates with SystemC. Here are the current SystemC integrations in 2025:
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Coco Code Coverage
Qt Group
Coco by Qt is an end-to-end code coverage and test analysis tool built for teams developing desktop, embedded, and safety-critical software. It supports multiple languages—including C, C++, C#, QML, and Tcl—and provides detailed insight into code coverage across unit, integration, and system testing. Coco helps engineering and QA teams identify untested paths, redundant test cases, and hidden logic branches to improve software reliability and performance. Designed for compliance-driven industries, it generates audit-ready reports aligned with international standards like ISO 26262, DO-178C, and IEC 62304. Seamlessly integrating with CI/CD pipelines and IDEs such as Visual Studio, Eclipse, and Qt Creator, Coco streamlines test validation across toolchains and environments. With precision, automation, and compliance at its core, Coco enables faster releases without compromising quality or safety. -
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ModelSim
Siemens
ModelSim simulates behavioral, RTL, and gate-level code, delivering increased design quality and debug productivity with platform-independent compilation. Single kernel simulator technology enables transparent mixing of VHDL and Verilog in one design. ModelSim packs an unprecedented level of verification capabilities into a cost-effective HDL simulator and is ideally suited for the verification of small and medium-sized FPGA designs, especially designs with complex, mission-critical functionality. ModelSim’s advanced code coverage capabilities provide valuable metrics for systematic verification. Plus, ModelSim’s ease of use lowers the barriers to leveraging verification resources. All coverage information is stored in the highly efficient UCDB database. Coverage results can be viewed interactively, post-simulation, or after a merge of multiple simulation runs. An easy-to-use and unified environment provides FPGA designers with the advanced capabilities they need for debugging.
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