Audience
Anyone searching for a platform that synthesizes and analyzes mm-wave spiral devices and T-lines
About Ansys VeloceRF
Ansys VeloceRF shortens the design cycle by greatly reducing the time it takes to synthesize and model complex spiral devices and T-lines. It takes only a few seconds to compile an inductor or transformer geometry, and just a couple of minutes to model and analyze it. It integrates with leading EDA platforms, instantiating ready-to-tape-out layouts. Ansys VeloceRF allows you to synthesize devices with tight packing of multiple devices and lines for an optimized silicon floorplan. Analysis of the coupling among any number of inductive devices before detailed layout will reduce design size and reduce or eliminate guard rings. Inductor size as well as inductor-to-inductor crosstalk can impact the die size. Ansys VeloceRF helps you design smaller devices through the use of optimization criteria and geometry constraints. In addition, it calculates coupling among any number of inductors to better optimize silicon real estate and to optimize inductors in circuit context.
PathWave RFIC Design
Go beyond traditional RF simulation to design, analyze, and verify radio frequency integrated circuits (RFICs). Achieve confidence with steady-state and nonlinear solvers for design and verification. Wireless standard libraries accelerate the validation of complex RFICs. Before taping out an RFIC, verification of IC specifications via RF simulation is a must. Simulations include effects of layout parasitics, complex modulated signals, and digital control circuitry. With PathWave RFIC Design, you can simulate in both the frequency and time domain and bring your designs to and from Cadence Virtuoso. Accurately model components on silicon chips. Optimize designs with sweeps and load-pull analysis. Integrate RF designs in the Cadence Virtuoso environment. Increase performance using Monte Carlo and yield analysis. Simplify debugging with safe operating area warnings. Utilize the latest foundry technology immediately.
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PathWave Advanced Design System (ADS)
PathWave ADS offers integrated design guidance via templates to help you get started faster. Extensive component libraries make it easy to find the part you want. Automatic sync with layout allows you to visualize the physical layout while making schematic designs. Data helps teams visualize whether their designs meet specifications. The data display and analytics capabilities in PathWave ADS produce graphs, charts, and diagrams to give you design confidence. Quickly accelerate your design with wizards, design guides, and templates. The complete design flow includes schematic, layout, circuit, electro-thermal, and electromagnetic simulations. Signal and power integrity are becoming more important as frequency and speed increase in printed circuit boards (PCBs). Losses associated with transmission line effects can cause failures in electronic devices. Modeling traces, vias, and interconnects are necessary to simulate the board accurately.
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Ansys RaptorH
Ansys RaptorH is an electromagnetic modeling software with capacity to model power grids, full custom blocks, spiral inductors, and clock trees. Its high-speed distributed processing delivers accurate, silicon-proven S-parameter and RLCk models. RaptorH can analyze partial and unfinished layouts during the design phase and makes it easy to use either the general purpose HFSS engine or the silicon-optimized RaptorX engine for silicon structures. Ansys RaptorH extracts electromagnetic models at the pre-LVS stage for arbitrary routing and layout, including planes (solid or perforated), round shapes, spiral inductors, and MiM/MoM capacitors - with automatic setting of boundary conditions. The GUI allows point-and-click net selection and what-if analyses. RaptorH is supported by all major silicon foundries and can read encrypted technology files to set up analyses with either the HFSS or the Raptor engine.
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Ansys Exalto
Ansys Exalto is a post-LVS RLCk extraction software solution that enables IC designers to accurately capture unknown crosstalk among different blocks in the design hierarchy by extracting lumped-element parasitics and generating an accurate model for electrical, magnetic and substrate coupling. Exalto interfaces with most LVS tools and can complement the RC extraction tool of your choice. Ansys Exalto post-LVS RLCk extraction lets IC designers accurately predict electromagnetic and substrate coupling effects for signoff on circuits that were previously "too big to analyze.” The extracted models are back-annotated to the schematic or netlist, and support all circuit simulators. The proliferation of RF and high-speed circuits in modern silicon systems has raised electromagnetic coupling to a first order effect that must be accurately modeled to reliably achieve silicon success.
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Company Information
Ansys
Founded: 1970
United States
www.ansys.com/products/semiconductors/ansys-velocerf
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