ViennaTS is a C++, OpenMP-parallelized Topography simulator, focusing on processing challenges for micro- and nanoelectronics. At its core is the Level Set framework, allowing for an implicit surface description of material surfaces and interfaces. Within this framework models for geometry manipulation such as boolean operations and chemical mechanical planarization have been implemented. The tool supports several etching and deposition models, essential for the understanding of process-induced phenomena in micro- and nanoelectronics. The model support includes but is not limited to silicon etching in SF6/O2 and HBr/O2 plasmas, silicon dioxide etching in CF4 plasma, anisotropic wet etching of silicon, CFx polymer deposition on silicon, as well as several adaptable deposition models. ViennaTS is currently in a prototype state; the development is done on GitHub: https://github.com/viennats/viennats-dev
Features
- 2D/3D Topography Simulation
- Process Simulation
- Plasma Etching
- Script-Based Input Control
- OpenMP-Based Multithreading
- C++ Application