Name | Modified | Size | Downloads / Week |
---|---|---|---|
Parent folder | |||
fbinop2addr.S | 2011-11-26 | 947 Bytes | |
fbinop.S | 2011-11-26 | 1.1 kB | |
fbinopWide2addr.S | 2011-11-26 | 963 Bytes | |
fbinopWide.S | 2011-11-26 | 1.0 kB | |
funop.S | 2011-11-26 | 828 Bytes | |
funopNarrower.S | 2011-11-26 | 840 Bytes | |
funopWider.S | 2011-11-26 | 840 Bytes | |
OP_ADD_DOUBLE.S | 2011-11-26 | 82 Bytes | |
OP_ADD_DOUBLE_2ADDR.S | 2011-11-26 | 87 Bytes | |
OP_ADD_FLOAT.S | 2011-11-26 | 78 Bytes | |
OP_ADD_FLOAT_2ADDR.S | 2011-11-26 | 83 Bytes | |
OP_CMPG_DOUBLE.S | 2011-11-26 | 1.6 kB | |
OP_CMPG_FLOAT.S | 2011-11-26 | 1.6 kB | |
OP_CMPL_DOUBLE.S | 2011-11-26 | 1.6 kB | |
OP_CMPL_FLOAT.S | 2011-11-26 | 1.6 kB | |
OP_DIV_DOUBLE.S | 2011-11-26 | 82 Bytes | |
OP_DIV_DOUBLE_2ADDR.S | 2011-11-26 | 87 Bytes | |
OP_DIV_FLOAT.S | 2011-11-26 | 78 Bytes | |
OP_DIV_FLOAT_2ADDR.S | 2011-11-26 | 83 Bytes | |
OP_DOUBLE_TO_FLOAT.S | 2011-11-26 | 81 Bytes | |
OP_DOUBLE_TO_INT.S | 2011-11-26 | 82 Bytes | |
OP_FLOAT_TO_DOUBLE.S | 2011-11-26 | 78 Bytes | |
OP_FLOAT_TO_INT.S | 2011-11-26 | 73 Bytes | |
OP_INT_TO_DOUBLE.S | 2011-11-26 | 78 Bytes | |
OP_INT_TO_FLOAT.S | 2011-11-26 | 73 Bytes | |
OP_MUL_DOUBLE.S | 2011-11-26 | 82 Bytes | |
OP_MUL_DOUBLE_2ADDR.S | 2011-11-26 | 87 Bytes | |
OP_MUL_FLOAT.S | 2011-11-26 | 78 Bytes | |
OP_MUL_FLOAT_2ADDR.S | 2011-11-26 | 83 Bytes | |
OP_SUB_DOUBLE.S | 2011-11-26 | 82 Bytes | |
OP_SUB_DOUBLE_2ADDR.S | 2011-11-26 | 87 Bytes | |
OP_SUB_FLOAT.S | 2011-11-26 | 78 Bytes | |
OP_SUB_FLOAT_2ADDR.S | 2011-11-26 | 83 Bytes | |
README.txt | 2011-11-26 | 366 Bytes | |
Totals: 34 Items | 15.0 kB | 0 |
Instruction handlers that take advantage of ARM VFP. These work with VFP v2 and v3 (VFPLite). The ARM code driving the floating-point calculations will run on ARMv5TE and later. It assumes that word alignment is sufficient for double-word accesses (which is true for some ARMv5 and all ARMv6/v7), to avoid having to transfer double-precision values in two steps.